2019-03-27 03:26 AM
Hello there,
I am developing a FreeRTOS based application using STM32L452 MCU. I am looking for a way, to reduce the power consumption in the idle intervals of the processors work. When reviewing the sleep modes, it occured to me that the MCU might be unresponsive to external events or even lose context (MCU reset), which is not fit in this RTOS running application.
I thought then that I could simply reduce the HCLK frequency by playing with the PLL registers. The problem here is that the systick timer will get altered, and I really need it to stay with its regular timebase (1 ms). I checked either it is possible to clock the Systick timer from other sources, but it seems like its only HCLK and HCLK / 8. The datasheet says it is calibrated for this value.
I would appreciate some suggestions on this topic.
Lukasz.
Solved! Go to Solution.
2019-03-27 06:01 AM
2019-03-28 04:30 AM
It might be easier to use ChibiOS which is designed to support "tickless" operation. As a point of reference, using an stm32l432 with an external RTC from microcrystal (rv-8803-c7) as a 1khz input to the stm32l432 RTC. I measured 430nA in standby at 2.4 v (520nA at 3v). Stop2 would be more like 1.7uA, but has some advantages. "Wakeup" from standby is more complicated because it looks like a reset, which requires a somewhat more complex system architecture.
It wasn't clear from your notes what your timing needs are. If you need a precise high speed oscillator, when in "run" mode, then you might consider powering it down in your long sleep periods.
2019-03-28 04:34 AM
2019-03-28 04:41 AM
Fair enough. It was a little hard to be sure what your requirements are, for example interrupt latency. Best of luck in your quest to save power -- always a rocky and interesting road.
2019-03-28 04:43 AM
2019-03-28 04:44 AM
On the stm32f437, it is possible in the clock tree to modulate syclk while keeping peripheral clock fixed IF it has been chosen to be the lowest possible.
This way you can even cranck-up the gearbox only in interrupts...
2019-03-28 04:47 AM
2019-03-28 05:53 AM
FreeRTOS tickless mode does exactly what you want. The SysTick timebase is preserved, any tasks delayed for specific periods or timeouts will still respond at the right time, and any external interrupt will exit low power sleep mode. Unlike stop and standby mode there are no limitations on wakeups and clocks.
Sleep mode halts the processor clock, far more power efficient than just slowing down the clock rate. The instruction clock, but not PCLK for peripherals, is halted. The core exits from sleep mode very quickly after any external interrupt occurs. Tickless mode updates the FreeRTOS tick count for total elapsed time while asleep.
What you save here is the power consumed by the core while executing instruction in idle mode, for the total length of the idle period, not just fragments between systick interrupts. Its far less complicated than frequency switching. Saves more power too...after all, zero Mhz will always consume less current.
The sleep mode core implementation is one thing ST does much better than most of its low power M class competitors, especially on the L4 series, and FreeRTOS takes full advantage of it. If you're using battery power don't ignore it.
Jack Peacock
2019-03-28 06:00 AM
2019-03-28 06:31 AM
Jack,
I think I get the idea now. After turning on the configUSE_TICKLESS_IDLE flag, The processor will go to sleep each time it is idle. When should the system consider the application idle is set with configEXPECTED_IDLE_TIME_BEFORE_SLEEP. The last thing I am not sure I understand is how will an external event wake up the MCU? I have found the code for figuring out how much time did the MCU actually spent in idle state but I cant find how will the system know that some interrupt has placed an intem in a queue and it has to be handled?