Is fADC=48MHz actually possible?

[Andrew Sterian]

I tried using STM32CubeMX to configure an STM32H725 LQFP-100 device to get fADC=48MHz by getting the ADC Clock Mux output to 96 MHz, and using a /2 prescaler on the ADC1 peripheral but the drop-down for "ADC Clock Prescaler" only allows /4 or higher (24MHz or lower).

 

I need fADC=48MHz in order to sustain a high sampling rate. What am I missing?

[waclawek.jan]

What do the datasheet and RM say about the maximum ADC clock?

Do you select properly the ADC clock source? Don't you try APB as source?

I don't Cube.

JW

[Bouraoui Chemli]

Hi @Andrew Sterian​ 

I assume that it is a limitation regarding CubeMX tool. I suggest to modify in the main.c file the clock Prescaler configuration after the code generation with CubeMX as below:

"AdcHandle_master.Init.ClockPrescaler      = ADC_CLOCK_ASYNC_DIV4; " 

by

"AdcHandle_master.Init.ClockPrescaler      = ADC_CLOCK_ASYNC_DIV2; "

Bouraoui

[Andrew Sterian]

Thanks Bouraoui. I was hoping this is the case since the data sheet specifically lists such high clock speeds are required in order to maintain >3Msps operation:

Is there any place where I can file a bug report for CubeMX?

[Bouraoui Chemli]

Hi @Andrew Sterian​ 

I raised this internally.

Thank you

Bouraoui