STM32L412 External Crystal RTC inaccuracy of 24-30 Seconds in 24 Hours

[DBhut.1]

Hello,

We are using STM32L412 RTC with STM32CubeIDE.

Previously we are using

Crystal - 32.768 Khz SMD Crystal YXC YSX306GA 8.0 x 3.8 mm

load capacitance - 10pf 0805

In Previous Crystal we get about 6 seconds of RTC drift,

to solve this issue, study the application note AN2867 : https://www.st.com/resource/en/application_note/cd00221665-oscillator-design-guide-for-stm8afals-stm32-mcus-and-mpus-stmicroelectronics.pdf

and from this used below setup:

Crytsal - ABRACON ABS25-32.768KHZ-6-T Crystal, 32.768 kHz, SMD, 8mm x 3.8mm, 20 ppm

load capacitance - 6pF 0805

But In new setup we are getting 24-30 seconds of drifiting.

As we are following all guidlines mention in application notes, as compared to previous crystal, but getting more rtc drift (almost 4 time of previous rtc drift)

Please help us to solve this issue.

Thank You

[LCE]

Ouch...

Then the GND connection between STM32 and not only the crystal, but most other components is... terrible.

Always think of GND as a signal.

It doesn't help if you get short "signal" traces between 2 devices, but the GND connection between them is taking "a long way".

Even worse, because GND is kinda "shared connection".

[DBhut.1]

I have performed this testing, and rtc drift in 24 hours is about 20 seconds(earlier 24 seconds) and still device is in testing.

[DBhut.1]

Hello @Peter BENSCH​ , I have some doubt about crystal connections:

 

As shown in above schematic, crystal pins 1 and 4 is quartz crystal and another two pin (2 and 3) is connected to GND.

In many schematic, we found that some schematic keep crystal other pin floating.

and according to crystal datasheet: https://abracon.com/Resonators/abs25.pdf

 

Pin 2 and 3 are not Connected to GND (Floating).

So,

1) Is above schematic is ok?

2) What can be impact with GND Connection to pin 2 and 3?

3) What can be impact without GND Connection to pin 2 and 3?

[Oliver Sedlacek]

When you say 24 secs of drift, do you mean a fixed (give or take) error, a difference with temperature or random errors over 24 hours. Can you route the LSE output to an MCO to a pin so you look at it cycle by cycle.

Is the stability affected by drive power level?

[Piranha]

Read my comment in this topic:

https://community.st.com/s/question/0D53W00001JCWlASAX/stm32f103c8-production-board-schematic

With a load capacitance of 6 pF on a two layer board, a 6,8 pF capacitors are almost surely too small. The appropriate value should be 8-10 pF and I would start with a 10 pF.

[DBhut.1 · Accepted solution]

We finally solved this issue and concluded, using (Cl1*Cl2)/(Cl1+Cl2)=load_capacitance.

So our value for c1=c2=12pf.

Thank to all for your valuable suggestion and time.