Well, first of all, the clock scheme looks ok.
You have connected the crystal using very short tracks to the STM32L412C, but GND looks very suspicious: no GND area under the crystal, no guard ring around crystal and its C's, no shortest possible connection from GND (crystal, C's) to the GND of the STM32L412C.
I always have a standard statement for this:
But please don't forget to layout GND accordingly, i.e. shaped like a (GND) hand holding a stone (crystal), where the "hand" must be separated from the rest of the GND layer and only connected via the "arm" to the closest GND pin of the STM32, see AN2867, section 7.2, fig. 14...16. I hope that the linguistic picture illustrates this in an understandable way?
Unfortunately, we don't see where GND is routed from the crystal + C's to the STM32 in your case, nor do we know the circuit, so we can't rule out the possibility that interference pulses are interspersed somewhere that lead to the observed deviation.
Regards
/Peter
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