STM32F746G-Discovery ADC3 refuses to trigger off TMR5 (any timer) using default cubemx prj config in STM32CubeIDE Version: 1.3.1. The interrupt from T5 works. ADC works when soft-start. Is this an ADC3 issue? Can I use SWD/trace to see ADC status? How?

[SStep.11]

static void MX_ADC3_Init(void)

{

 ADC_ChannelConfTypeDef sConfig = {0};

...

hadc3.Instance = ADC3;

 hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;

 hadc3.Init.Resolution = ADC_RESOLUTION_12B;

 hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE;

 hadc3.Init.ContinuousConvMode = DISABLE;

 hadc3.Init.DiscontinuousConvMode = DISABLE;

 hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;

 hadc3.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T5_TRGO;

 hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;

 hadc3.Init.NbrOfConversion = 1;

 hadc3.Init.DMAContinuousRequests = DISABLE;

 hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;

 if (HAL_ADC_Init(&hadc3) != HAL_OK)

...

sConfig.Channel = ADC_CHANNEL_4;

 sConfig.Rank = ADC_REGULAR_RANK_1;

 sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;

 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)

...

/* USER CODE END ADC3_Init 2 */

-----------------------------------

static void MX_TIM5_Init(void)

{

 /* USER CODE BEGIN TIM5_Init 0 */

 /* USER CODE END TIM5_Init 0 */

 TIM_ClockConfigTypeDef sClockSourceConfig = {0};

 TIM_MasterConfigTypeDef sMasterConfig = {0};

 TIM_OC_InitTypeDef sConfigOC = {0};

 /* USER CODE BEGIN TIM5_Init 1 */

 /* USER CODE END TIM5_Init 1 */

 htim5.Instance = TIM5;

 htim5.Init.Prescaler = 8000;

 htim5.Init.CounterMode = TIM_COUNTERMODE_UP;

 htim5.Init.Period = 5000;

 htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;

 htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;

 if (HAL_TIM_Base_Init(&htim5) != HAL_OK)

...

sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;

 if (HAL_TIM_ConfigClockSource(&htim5, &sClockSourceConfig) != HAL_OK)

...

sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;

 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;

 if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK)

...

sConfigOC.OCMode = TIM_OCMODE_TIMING;

 sConfigOC.Pulse = 0;

 sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;

 sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;

 if (HAL_TIM_OC_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)

[waclawek.jan]

Read out and check/post TIM and ADC registers content.

JW

[SStep.11]

int main(void)

{

 HAL_Init();

 SystemClock_Config();

 MX_GPIO_Init();

 MX_ADC3_Init();

 MX_TIM5_Init();

if (HAL_ADC_Start_IT(&hadc3) != HAL_OK) {   Error_Handler(); }

if (HAL_TIM_Base_Start_IT(&htim5) != HAL_OK) {   Error_Handler(); }

 while (1) {}

Know a command for a way to get a text reg dump?

I wish I knew the commands to get the SWD/ST-Link to do a conditional breakpoint on the timer trigger no-output compare bit. It works set for software with HAL_ADC_Start() in the TIM5 interrupt callback. I'm thinking ADC3 must be slaved to ADC1/2? Or some HAL bug? Troubleshooting method - check for clocks, ADON? I've spent hours on this :confounded_face:

Thanks a lot!

[waclawek.jan]

TIM5_CR1.CEN=0 i.e. timer does not run.

(It's given away also by the fact that TIM5_CNT does not change).

TIM2_CR2.MMS=0b010 = TRGO from Update appears to be OK as well as ADC3_CR2.EXTSEL=0b0100 = Timer 5 TRGO, and CR2.EXTEN is set, so that looks good too.

You haven't shown the ADC3_SQRx registers, those are important too, determining the channels to be converted and their number. But some conversion should happen even if those are at reset settings, you should see that in status bits (SR.EOC).

I did not look further. Enable the timer; if ADC still won't run, I am out, I don't use the 'F7 and also use ADC rarely.

Read the RM. Seriously.

As you might've gathered, I don't use Cube/HAL and don't understand its gobbledygook. The mcu doesn't use it either, it works out of the registers. You can get many things going directly by manipulating registers in the debugger (watching out for cases where observing in debugger is intrusive, e.g. status bits where reading clears them - shouldn't be the case of basic ADC setup, though, if I am not mistaken - as I've said I rarely use the ADC).

JW

[SStep.11]

Thanks for the reply. I put Bkpts in T5 int's & notice CNT. I found a similar (T2) ADC-Timer config, in main.c & cubemx, in a youtube ST scope project. Didn't help. Cycle power and the ADC fires fine if put in continuous or soft-trig mode when not debugging. Somethings amiss.