How to enable GIC interrupts in stm32mp157a

[srikanth]

We are using Stm32mp157A .We Want to generate Interupts in Core0.For this we are using System timer Generator .We enable STGN and loaded Frequency value(STGN_CNTFID0),STGENC_CNTCV is increamenting . But we are not getting interrupts.

We configure GIC registers Also.

Please help in this regards.

[Genadi Zawidowski]

For distinguish problem - tray to use SecurePhysicalTimer. PL1_*** are CMSIS functions.

static uint_fast32_t gtimloadvalue;
 
	void
	SecurePhysicalTimer_IRQHandler(void)
	{
		//IRQ_ClearPending (SecurePhysicalTimer_IRQn);
		PL1_SetLoadValue(gtimloadvalue);
 
		spool_systimerbundle1();	// При возможно�?ти вызывают�?�? �?только раз, �?колько произошло таймерных прерываний.
		spool_systimerbundle2();	// Е�?ли пропущены прерывани�?, компен�?ировать дополнительными вызовами нет �?мы�?ла.
	}
....
	// Prepare funcionality: use CNTP
	const uint_fast32_t gtimfreq = stm32mp1_get_hsi_freq();
 
	PL1_SetCounterFrequency(gtimfreq);	// CNTFRQ
 
	gtimloadvalue = calcdivround2(gtimfreq, ticksfreq) - 1;
	// Private timer use
	// Disable Private Timer and set load value
	PL1_SetControl(PL1_GetControl() & ~ 0x01);	// CNTP_CTL
	PL1_SetLoadValue(gtimloadvalue);	// CNTP_TVAL
	// Enable timer control
	PL1_SetControl(PL1_GetControl() | 0x01);
 
	arm_hardware_set_handler_system(SecurePhysicalTimer_IRQn, SecurePhysicalTimer_IRQHandler);

[PatrickF]

Hi,

STGEN does not directly generate interrupts, it only provide a 64-bit counter bus to ARM Generic Timer (which embed in Cortex-A7 as well as the GIC).

As I understood your are not using ST SW deliveries and doing bare-metal programming, I recommend that you read some ARM related documentation.

• ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition : https://developer.arm.com/documentation/ddi0406/latest
• Arm® Generic Interrupt Controller - Architecture Specification v2.0 : https://developer.arm.com/documentation/ihi0048/latest
• Cortex®-A7 MPCore Technical Reference Manual Revision: r0p5 : https://developer.arm.com/documentation/ddi0464/latest, more specifically, the Generic Timer section: https://developer.arm.com/documentation/ddi0464/f/Generic-Timer/About-the-Generic-Timer

Regards.

[srikanth]

Hi,

Thank you for the reply, We are developing the bare metal programming . I enabled STGN, its counter value is getting incrementing but i want to control the speed of that counter . if i change frequency in STGN frequency register its not changing the counters value increasing speed . Means i am unable to control the speed of the counter . For this what may be the reason .

[PatrickF]

Hi,

STGEN count frequency if fixed, it depend on RCC and can be either HSI or HSE.

The 'frequency' register in STGEN is only to inform system SW of the STGEN root frequency (e.g. set to 0x016E3600 for 24MHz) which will help to compute the ARM Generic Timer registers to get desired frequencies. I think it's use is optional.

As per ARM Architecture Reference Manual requirement, STGEN only provide time reference to ARM Generic Timers. If you want to change the frequency of interrupt occurring inside Cortex-A7 subsystem on GIC PPI (Hypervisor, Virtual, Secure physical or Non-Secure physical timer), you need to change the ARM Generic Timer settings.

Regards.

[srikanth]

Hi,

Thank you for the reply please can you provide the any bare metal example for the timer with interrupt . its very much help full for the cortex A7 (STM32MP157)

[Genadi Zawidowski]

TIM3 handler:

https://github.com/ua1arn/hftrx/blob/e9d46bf38d3fef34c04b11fb4a00eb102d219107/src/clocks.c#L2175

TIM3 init:

https://github.com/ua1arn/hftrx/blob/e9d46bf38d3fef34c04b11fb4a00eb102d219107/src/clocks.c#L9935

TIM3 set period:

https://github.com/ua1arn/hftrx/blob/e9d46bf38d3fef34c04b11fb4a00eb102d219107/src/clocks.c#L9993

[PatrickF]

Hi,

Bare-Metal support is not provided for STM32MP15 Cortex-A7, there is maybe 3rd party who can provide Bare-Metal implementation.

Anyway, you could probably found many useful pieces of code in TF-A sources (https://github.com/STMicroelectronics/arm-trusted-firmware) which come mostly from ARM (especially for the portion related to Cortex-A7, GIC and Generic Timers which are not SoC dependent).

Regards.

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