How to configure PTP PPS out?

GLaure · ‎2022-06-03

Hi!

I am trying to enable PTP on STM32F157 DK2 evaluation board.

From my understanding, pps_available should return 1, (if configured correctly).

root@stm32mp1:~# cat /sys/class/ptp/ptp0/pps_available 
0

I added "linuxptp" to the image:

IMAGE_INSTALL_append += " \
    linuxptp \
    "

I tried to follow the instructions for kernel 4.14:

https://community.st.com/s/question/0D50X0000BMG2RoSQL/how-do-i-enable-linuxptp-pps-output

To enable PPS Out, I also patched stm32mp-mp15-pinctrl.dtsi

diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index 236d77e..1e74905 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -160,6 +160,7 @@
 	ethernet0_rgmii_pins_a: rgmii-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
+				 <STM32_PINMUX('G', 8, AF11)>, /* ETH_PPS_OUT */
 				 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 				 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 				 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
@@ -191,6 +192,7 @@
 	ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
+				 <STM32_PINMUX('G', 8, ANALOG)>, /* ETH_PPS_OUT */
 				 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 				 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 				 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
-- 
2.25.1

As far as I could see, the other changes are not longer needed for kernel 5.10.

Still cat /sys/class/ptp/ptp0/pps_available returns 0.

What did I miss?

Any help is greatly appreciated!

Have a nice weekend!

Gunther

OlivierK · ‎2022-07-04

Hi GLaure (Community Member),

In fact to get the PG8 clock to work you also need to launch a PTP synchronization first

1- install linuxptp on the DK2 :

root@stm32mp1:~# apt-get install linuxptp

2- launch the PTP synchro

root@stm32mp1:~# ptp4l -l 6 -m -i eth0 -p /dev/ptp0

3- change the duty cycle of the PPS clock for a close to 50% ratio

root@stm32mp1:~# echo "0 0 0 1 1" > /sys/class/ptp/ptp0/period

Regards,

Olivier

View solution in original post

OlivierK · ‎2022-06-06

Hi GLaur.3 (Customer)

Can I ask which OpenSTLinux version you use?

and if you can please dump the clk_summary:

root@stm32mp1-disco:~# cat /sys/kernel/debug/clk/clk_summary > log.txt

Regards,

Olivier

GLaure · ‎2022-06-06

Hi @OlivierK

The used OpenSTLinux version is: openstlinux-5.10-dunfell-mp1-21-11-17

I am building the image based on st-image-core without graphical applications.

The device tree contains changes to enable FDCAN 1 & 2, SPI4, QSPI and FMC.

I attached the clk_summary.

Thank you for your fast response!

Gunther

OlivierK · ‎2022-06-07

Hi GLaur.3 (Community Member)

I've loaded the same version as you. Normally the ptp clock is alive:

root@stm32mp1:~# grep ethptp_k /sys/kernel/debug/clk/clk_summary

ethptp_k 1 1 0 99000000 0 0 50000

For some reason, it doesn't show out. I need to go a step further..

Rgds

Olivier

GLaure · ‎2022-06-08

@OlivierK

Hi!

Do you have know if a previous OpenSTLinux version had PTP PPS out working?

Bye Gunther

OlivierK · ‎2022-06-10

Hi GLaur.3 (Community Member)

As you discovered, some hints were done on kernel 4.19 + patches:

https://community.st.com/s/question/0D50X0000BMG2RoSQL/how-do-i-enable-linuxptp-pps-output

As for a HAL point of view, the PPS PTP has been verified, but not yet on the linux part.

Patches were merged on latest ostl v3.1 version, the PPS output clock has been fixed, but there are still missing information. We are investigating internally, I will soon let you know.

Regards

Olivier

OlivierK · ‎2022-06-17

Hi GLaur.3 (Community Member)

I tried to follow this page https://www.kernel.org/doc/html/latest/driver-api/pps.html

I've rebuild the kernel (ostl v3.1) to include the pps support in kernel menuconfig (PPS debugging messages, Kernel timer client, PPS line discipline, PPS client using GPIO)

installing the pps-tools on target (after enabling the network on DK board)

root@stm32mp1:~# apt-get install pps-tools

probing the pps-ktimer module

root@stm32mp1:~# modprobe pps-ktimer

[ 745.191786] pps pps0: new PPS source ktimer

[ 745.194557] pps pps0: ktimer PPS source registered

Then pps0 is available...

root@stm32mp1:~# ls /sys/class/pps/pps0/

assert clear dev echo mode name path power subsystem uevent

Then a timestamp and sequence number appears.

root@stm32mp1:~# cat /sys/class/pps/pps0/assert

1655492903.016517289#721

Then I am able to launch a pps test

root@stm32mp1:~# ppstest /dev/pps0

trying PPS source "/dev/pps0"

found PPS source "/dev/pps0"

ok, found 1 source(s), now start fetching data...

source 0 - assert 1655493082.936502257, sequence: 894 - clear 0.000000000, sequence: 0

source 0 - assert 1655493083.976522050, sequence: 895 - clear 0.000000000, sequence: 0

source 0 - assert 1655493085.016511920, sequence: 896 - clear 0.000000000, sequence: 0

source 0 - assert 1655493086.056506553, sequence: 897 - clear 0.000000000, sequence: 0

source 0 - assert 1655493087.096503036, sequence: 898 - clear 0.000000000, sequence: 0

source 0 - assert 1655493088.136501043, sequence: 899 - clear 0.000000000, sequence: 0

...

Regards,

Olivier

GLaure · ‎2022-06-19

Good Morning @OlivierK

Thank you for your support! I will follow your instruction and report back!

Regards,

Gunther

OlivierK · ‎2022-07-04

Hi GLaure (Community Member),

In fact to get the PG8 clock to work you also need to launch a PTP synchronization first

1- install linuxptp on the DK2 :

root@stm32mp1:~# apt-get install linuxptp

2- launch the PTP synchro

root@stm32mp1:~# ptp4l -l 6 -m -i eth0 -p /dev/ptp0

3- change the duty cycle of the PPS clock for a close to 50% ratio

root@stm32mp1:~# echo "0 0 0 1 1" > /sys/class/ptp/ptp0/period

Regards,

Olivier

OlivierK · ‎2022-08-05

Hi GLaure (Community Member),

Any feedback? have you progressed on this topic?

Regards,

Olivier