Hello everyone,
I wonder if it is possible to develop and run a custom coprocessor firmware on the Cortex-M0 of the chip. From what I understood so far, the FLASH and RAM portions dedicated to FUS, Safeboot, and Wireless Stack are locked from the factory, with the FUS being the only possibility to write anything to it. And since the FUS appears to perform a digital signature check for any firmware sent to it, there isn't an easy way to flash your own. So, is there an official way to do it?
From what I understand about the boot process of CPU2 (i.e., the Cortex-M0), it gets started by the CPU1, but its start offset from the secured option bytes. The manuals (and my own unsuccessful attempt) tell me that the secured option bytes can only be written by the CPU2, so any normal attempt to write to them (e.g., with the STM32CubeProg tool) will fail. But shouldn't I be able to, in principle, create a program for the Cortex-M0, write it so some designated portion of the flash, disable all the security and write the appropriate offsets to the option bytes (e.g., SFSA, SBRV, ...) and then kick off the CPU2 from within my CPU1 application? Or at least use the FUS to flash an image that I created myself? Is there any documentation on this?
Kind Regards,
Richard
