Correct procedure to enter in STOP2 mode in stm32wb, with BLE stack active?

[SDi B.2]

Hi,

I am currently working on a bluetooth application developing it on STM32WB55 Nucleo (FW version V1.13.1, BLE Stack Full)

Since the device will have to be connected to a battery, I was researching the use of Low Power modes.

Unfortunately, I'm not clear on the correct procedure to send in STOP2 mode the whole system, keeping the bluetooth active, I've already read questions on the forum and examples provided by ST but I'm not very clear on the whole procedure.

Reading on the forum, I understood that the second core is self-managing with regard to low power, and the first core can not control it otherwise it would break the power management.

Hence, there would be my questions:

- The correct procedure to follow on the first core, to send it into STOP 2, what would it be?

- Would there be any initialization or procedure to take into account to do also for the second core at the beginning?

- Since the system will go in that mode only when both cores are in the same state, how can I control the input of the second core so that I can send it in that mode when I want?

Thank you very much

[Amel NASRI]

Hi @SDi B.2​ ,

I suggest you to start by reviewing the example PWR_STOP2_RTC.

At the same page, you find a description of the example. You can customize it depending on your needs.

-Amel

[SDi B.2]

Hi @Amel NASRI​ ,

I have already analyzed that example by integrating it into the Heart Rate one, creating my own procedure for reaching STOP2 mode even with bluetooth on, I just wanted to know if there was a precise procedure or not but at this point I suppose I can keep the implemented one.

From the result of my tests I found that this mode (STOP2) cannot be reached once the BLE connection has been established but at most it can be reached when CPU1 is in STOP2 and CPU2 is in the middle of two advertisement messages.

Can you confirm that this is the only way to reach the STOP2 state without disabling the second core?

Thank you very much

[Amel NASRI]

Hi @SDi B.2​ ,

More accurate answer can be provided by our STM32WB experts. I add @Remi QUINTIN​ to this discussion.

-Amel

[Remi QUINTIN · Accepted solution]

Hi

Your statement is correct.

Indeed Stop2 cannot be forced by any application control running on CPU1 core. It is a system state that is reached when the RF block has no activity, hence in between two connection intervals when CPU2 core is in CSTOP mode.