2016-03-14 10:58 AM
I am setting the Baud Rate of USART1 by the HAL MX_USART1_UART_Init() function as
huart1.Init.BaudRate = br; I am also checking the BRR register setting by debugger and I am measuring a real BR on TXD by scope. BR source clock is PCLK2 from MSI (f = 4.192 MHz). Oversampling remains 16. Output is correct up to br=260000 (BRR=16) but for br>=270000 (BRR<=15) is output about 1000 Bd or even lower. Is it a severe hardware bug or what? Thank you for any information. Ivan2016-03-14 09:58 PM
I doubt you can set your USART clock divider lower than 1 (BRR=16).
2016-03-15 09:24 AM
Thank you, Tim, for the notice.
I missed the note on the next page of the Baud Rate generation in the datasheet.