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Why I am getting a link failure when the section names in the linker script match the names in Main?

GreenGuy
Lead

I am using a Nx_Webserver application example from STM32H735G-DK modified for STM32H743i-Eval. I have moved the Rx, Tx, NetXPool references to RAM_D2 and I find that I get an error when the linker runs if the RxDecripSection and TxDecripSection name matches that which is in main. If the names are different it links fine and the map shows the sections mentioned in 0x240xxxxx. Not what I want.

the likker script looks like this:

/* Entry Point */
ENTRY(Reset_Handler)
 
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM_D1) + LENGTH(RAM_D1);    /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200;      /* required amount of heap  */
_Min_Stack_Size = 0x400; /* required amount of stack */
 
/* Specify the memory areas */
MEMORY
{
  FLASH (rx)     : ORIGIN = 0x08000000, LENGTH = 2048K
  DTCMRAM (xrw)  : ORIGIN = 0x20000000, LENGTH = 128K
  RAM_D1 (xrw)   : ORIGIN = 0x24000000, LENGTH = 512K
  RAM_D2 (xrw)   : ORIGIN = 0x30000000, LENGTH = 288K
  RAM_D3 (xrw)   : ORIGIN = 0x38000000, LENGTH = 64K
  ITCMRAM (xrw)  : ORIGIN = 0x00000000, LENGTH = 64K
}
 
/* Define output sections */
SECTIONS
{
  /* The startup code goes first into FLASH */
  .isr_vector :
  {
    . = ALIGN(4);
    KEEP(*(.isr_vector)) /* Startup code */
    . = ALIGN(4);
  } >FLASH
 
  /* The program code and other data goes into FLASH */
  .text :
  {
    . = ALIGN(4);
    *(.text)           /* .text sections (code) */
    *(.text*)          /* .text* sections (code) */
    *(.glue_7)         /* glue arm to thumb code */
    *(.glue_7t)        /* glue thumb to arm code */
    *(.eh_frame)
 
    KEEP (*(.init))
    KEEP (*(.fini))
 
    . = ALIGN(4);
    _etext = .;        /* define a global symbols at end of code */
  } >FLASH
 
  /* Constant data goes into FLASH */
  .rodata :
  {
    . = ALIGN(4);
    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
    . = ALIGN(4);
  } >FLASH
 
  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
  .ARM : {
    __exidx_start = .;
    *(.ARM.exidx*)
    __exidx_end = .;
  } >FLASH
 
  .preinit_array     :
  {
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array*))
    PROVIDE_HIDDEN (__preinit_array_end = .);
  } >FLASH
 
  .init_array :
  {
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array*))
    PROVIDE_HIDDEN (__init_array_end = .);
  } >FLASH
 
  .fini_array :
  {
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array*))
    PROVIDE_HIDDEN (__fini_array_end = .);
  } >FLASH
 
  /* used by the startup to initialize data */
  _sidata = LOADADDR(.data);
 
  /* Initialized data sections goes into RAM, load LMA copy after code */
  .data :
  {
    . = ALIGN(4);
    _sdata = .;        /* create a global symbol at data start */
    *(.data)           /* .data sections */
    *(.data*)          /* .data* sections */
    *(.RamFunc)        /* .RamFunc sections */
    *(.RamFunc*)       /* .RamFunc* sections */
 
    . = ALIGN(4);
    _edata = .;        /* define a global symbol at data end */
  } >RAM_D1 AT> FLASH
 
  /* Uninitialized data section */
  . = ALIGN(4);
  .bss :
  {
    /* This is used by the startup in order to initialize the .bss section */
    _sbss = .;         /* define a global symbol at bss start */
    __bss_start__ = _sbss;
    *(.bss)
    *(.bss*)
    *(COMMON)
 
    . = ALIGN(4);
    _ebss = .;         /* define a global symbol at bss end */
    __bss_end__ = _ebss;
  } >RAM_D1
 
/* threadX heap section*/
._threadx_heap :
  {
     . = ALIGN(8);
     __RAM_segment_used_end__ = .;
     . = . + 64K;
     . = ALIGN(8);
   } >RAM_D1 AT> RAM_D1
 
  /* User_heap_stack section, used to check that there is enough RAM left */
  ._user_heap_stack :
  {
    . = ALIGN(8);
    PROVIDE ( end = . );
    PROVIDE ( _end = . );
    . = . + _Min_Heap_Size;
    . = . + _Min_Stack_Size;
    . = ALIGN(8);
  } >RAM_D1
 
  /* Networking resources */
  .tcp_sec (NOLOAD): 
  {
   . = ABSOLUTE(0x30000000);
    *(.RxDecripSection)
 
   . = ABSOLUTE(0x30000060);
    *(.TxDecripSection)
  } >RAM_D2
 
 
  .nx_data (NOLOAD):
  {
   . = ABSOLUTE(0x30000100);
   *(.NxServerPoolSection)
  
   . = ABSOLUTE(0x30004100);
   *(.NetXPoolSection) 
  } >RAM_D2
 
 
  /* Remove information from the standard libraries */
  /DISCARD/ :
  {
    libc.a ( * )
    libm.a ( * )
    libgcc.a ( * )
  }
 
  .ARM.attributes 0 : { *(.ARM.attributes) }
}

And the relevant section in main private variables looks like this:

ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */

the sections defined for .nx_data are no problem. And before you ask, I do have the global define USE_D2_RAM set. So what did I miss?

1 ACCEPTED SOLUTION

Accepted Solutions
GreenGuy
Lead

Correcting myself. What I originally missed is the fact that in all the application examples for web servers, the discriptors are set to 4 not 0x60 which is the length required to hold 4 of them. Going back to a fresh project creation for STM32H743i-eval with default values selected for the peripherals, CubeMX sets the ETH parameters of TX and Rx Descriprtor lengths to 4 but the First Tx Descriptor Address is 0x30000200 not 0x30000060 like all the examples. I also notice that the build will use D2 ram but nothing is in the linker script to make that happen so the compiler is mapping them to D1 ram. So when is CubeMX going to start configuring the linker scripts so what you see in CubeMX is what you get? Seems like all time I wasted figuring this out could have been avoided. I also think that in ETH parameter settings the name "Tx Descriptor Length" is a little misleading. I would have preferred "Tx Descriptors" meaning "how many".

KnarfB - Thanks Again for the prompt!

View solution in original post

10 REPLIES 10

> I get an error when the linker runs

What error?

JW

GreenGuy
Lead

make: *** [makefile:87: STM32H743-EVAL-Utils.elf] Error 1

which in the make file the line 87 is :

   arm-none-eabi-gcc -o "STM32H743-EVAL-Utils.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m7 -T"/mnt/Data/DevData/STM32CubeIDE/Workspace_1-11-0/STM32H743-EVAL-Utils/STM32H743XIHX_FLASH.ld" --specs=nosys.specs -Wl,-Map="STM32H743-EVAL-Utils.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group

GreenGuy
Lead

this from the consol has a little more:

collect2: error: ld returned 1 exit status

make: *** [makefile:87: STM32H743-EVAL-Utils.elf] Error 1

GreenGuy
Lead

and this

STM32H743XIHX_FLASH.ld:180 cannot move location counter backwards (from 0000000030000900 to 0000000030000060)

Not sure why the linker thinks the counter is moving backwards from 30000900 since I never set it there.

Not explicitely, but you place the variable DMARxDscrTab in it. What is that variable's size? About 0x900? Then, you should adjust the ABSOLUTE statements accordingly.

hth

KnarfB

GreenGuy
Lead

So this is suggesting that I am running out of ram perhaps. But this all works if I don't use D2. Or if I comment our the RX and TX sections which are only using 0XC0 bytes. The next section is bigger so why does it work?

this is what the map file looks like when I remove the .tcp_sec section and the linker works OK.

._threadx_heap  0x000000002400fcd0    0x10000
                0x000000002400fcd0                . = ALIGN (0x8)
                0x000000002400fcd0                __RAM_segment_used_end__ = .
                0x000000002401fcd0                . = (. + 0x10000)
 *fill*         0x000000002400fcd0    0x10000 
                0x000000002401fcd0                . = ALIGN (0x8)
 
._user_heap_stack
                0x000000002401fcd0     0x1400
                0x000000002401fcd0                . = ALIGN (0x8)
                [!provide]                        PROVIDE (end = .)
                0x000000002401fcd0                PROVIDE (_end = .)
                0x00000000240200d0                . = (. + _Min_Heap_Size)
 *fill*         0x000000002401fcd0      0x400 
                0x00000000240210d0                . = (. + _Min_Stack_Size)
 *fill*         0x00000000240200d0     0x1000 
                0x00000000240210d0                . = ALIGN (0x8)
 
.nx_data        0x0000000030000000    0x1d100
                0x0000000030000100                . = ABSOLUTE (0x30000100)
 *fill*         0x0000000030000000      0x100 
 *(.NxServerPoolSection)
 .NxServerPoolSection
                0x0000000030000100     0x12c0 ./NetXDuo/App/app_netxduo.o
                0x0000000030004100                . = ABSOLUTE (0x30004100)
 *fill*         0x00000000300013c0     0x2d40 
 *(.NetXPoolSection)
 .NetXPoolSection
                0x0000000030004100    0x19000 ./AZURE_RTOS/App/app_azure_rtos.o

the limit for D1 is 0x24080000 and the heap is no where near the limit.

but when the .tcp_sec goes back in the linker it thinks it is counting back from 0x30000900 to 0x30000060 when adding the Tx Descriptor. And clearly the Rx Descriptor section is starting at 0x30000000. This really looks like a BUG.

Each discriptor RxDecripSection and TxDecripSection are 0x60 bytes each taking a total of 0xC0 bytes.

hmmm actually good question. I was answering based on other examples. Upon closer inspection the typedef contains 6 uint32 x 0x60 which is 0x900.

Thanks. Looks like netX grew the desicriptor.

GreenGuy
Lead

this fixes the problem in the linker:

  .tcp_sec (NOLOAD) : 
  {
   . = ABSOLUTE(0x30000000);
    *(.RxDecripSection)
 
   . = ABSOLUTE(0x30000900);
    *(.TxDecripSection)
  } >RAM_D2
 
 
  .nx_data (NOLOAD) :
  {
   . = ABSOLUTE(0x30001200);
   *(.NxServerPoolSection)
  
   . = ABSOLUTE(0x30005200);
   *(.NetXPoolSection) 
  } >RAM_D2