What's minimal possible jitter when using STM32 DAC with DMA?

[MFuch]

Hi,

I need to generate a special waveform via DAC on a STM32F446. DAC samples must be generated at about 240kHz but with minimal jitter. A DMA channel with timer trigger will provide the data from internal RAM or flash. What best case - minimal - jitter can I expect on my output signal (between two DAC samples)? I expect jitter to be caused by STM32 internal arbitration etc.

Matthias

[waclawek.jan]

To avoid DMA-related jitter, use timer-based trigger (i.e. transfer from holding to output register) in DAC. Read the DAC trigger selection subchapter in RM.

JW

[MikeDB · Accepted solution]

Whilst the DMA delivers the data to the DAC module, I believe the data is then buffered and latched onto the actual D-A though timer updates which shouldn't have any jitter. So only problem is if you are running the processor so hard that the internal busses are full, at which point the error is flagged.

On the device I use it says the DMAs are on different DMA streams so if you do hit any problems you could try the other DAC.

[MFuch]

Thanks that seems to be the trick. I will try.

[MikeDB]

There's also two STM application notes on getting the best performance out of the DACs.

http://www.st.com/resource/en/application_note/dm00129215.pdf

http://www.st.com/resource/en/application_note/cd00259245.pdf

[Amel NASRI]

Hi @MikeDB​ ,

Could you please edit your last post to put correct references to the application notes?

Thanks,

Amel

[MikeDB]

Sorry - did it from my phone and it looked ok on that