Vdd being held at 0.7V with backup battery fitted

[paulyoung9]

Posted on March 08, 2012 at 14:07

Hi,

When I switch off the power to my STM32F417 with a backup battery connected, the Vdd rail doesn't drop below 0.7V and Vbat falls rapidly. It looks like Vbat is connected to Vdd and is powering the rest of the circuit. If I briefly short Vdd to ground, it seems to sort itself out. I tried adding a resistor to load up the Vdd rail to see if this would help, but I just got lower voltage (~0.4V) and faster discharge of the backup battery. Seems like it needs a fairly hard short to ground to make it switch off. Has anyone got the battery backup working on STM32F4? Do I need to do some configuration in software before this will work correctly? Thanks. #battery-backup-rtc #inmates-running-asylum #battery-backup #stm32f4 #vbat-stm32f4 #vbat-battery-backup #vbat-stm32f4 #0.7v-rtc-vbat-battery-backup

[Tesla DeLorean]

Posted on July 05, 2012 at 15:42

Ok, just trying to ascertain if there is an accidental conduction path between the backup domain and primary supply or IO ring.

A number of people have been reporting issues here, at least enough that would worry me about a potential problem, surprised ST hasn't commented on this at all, and it's not in the errata. ST: A lot of us would appreciate it if you participated in your own forum.

[paul-arthur]

Posted on November 05, 2012 at 19:46

Any more information on that ?

Thanks

[Tesla DeLorean]

Posted on November 06, 2012 at 18:46

Any more information on that ?

Nothing in the August 2012 errata, have you discussed this with ST FAE's?

[paul-arthur]

Posted on November 12, 2012 at 18:43

hi guys,

I get it !In my design PDR_ON was left unconnected. If i pull it up; this probleme is solved !what about your design ?byePAM

[waclawek.jan]

Posted on November 13, 2012 at 06:27

> I get it !

> In my design PDR_ON was left unconnected.  > If i pull it up; this probleme is solved ! Ah, so the battery switch is in fact driven by the reset circuitry!? Could you please confirm this by pulling PDR_ON down and pulling NRST down (manually) when VDD goes off? Another snippet which should go to a revised user manual... JW

[Nickname12657_O]

Posted on January 07, 2013 at 10:55

Hi All,

Sorry for this so late reply, relying on the big community to be more available for help... But be sure that we try to take into account all feedbacks, as possible.Ah, so the battery switch is in fact driven by the reset circuitry!? In the RM0090, it is said that ''The switch to the VBAT supply is controlled by the power-down reset embedded in the Reset block.'' Do you think this topic needs much explanation? Cheers, STOne-32

[sergiy]

Posted on March 06, 2013 at 09:47

Dear STOne-32

On your question : ''Do you think this topic needs much explanation?'' my answer is : ''Yes, please. With much examples''I can setup and change all registers in STM32F407. I have setted external crystal for RTC. RTC peripheral is working from Vcc or from Vbat. Time is not reseted.When use Vbat power source for RTC the current is 44,5mA. What is wrong with hardware or software?Please, provide examples of settings. Where i can find ''

the power-down reset embedded in the Reset block

'' chapter?I can see ''low power'' only.Regards,Sergiy

[dejan]

Posted on July 23, 2013 at 23:13

> Do you think this topic needs much explanation?

Is it possible to use battery-backup without any additional reset supervisors that will pull PDR_ON down on power-down (as the pin is missing on TQFP-100 package, at least on Z-revision silicon)? And it would be good if there's a note in datasheet clearly specifying that PDR_ON should be pulled low in order to prevent excessive battery current.

[waclawek.jan]

Posted on July 24, 2013 at 11:11

> Is it possible to use battery-backup without any additional reset supervisors that will pull

> PDR_ON down on power-down (as the pin is missing on TQFP-100 package, at least

> on Z-revision silicon)? And it would be good if there's a note in datasheet clearly specifying > that PDR_ON should be pulled low in order to prevent excessive battery current. You probably misunderstood my comment above. I suspected the battery switch is related to system reset (the ORed result of various reset sources) and suggested an experiment where the internal reset would be off (PDR_ON low) and NRST active. I was wrong - as said above, the battery switch is driven directly from the output of internal powerdown/powerup reset circuit. Thus, PDR_ON should be tied high for it to be operational; and it *is* tied high in all the packages where it is not available externally, thus it *is* possible to use VBAT with these packages without further ado. In fact, the datasheet Rev 4 on page 30 in chapter 2.2.20 says: When PDR_ON pin is not connected to VDD (internal reset OFF), the VBAT functionality is no more available and VBAT pin should be connected to VDD. JW

[digital_dreamer]

Posted on September 10, 2013 at 05:43

I could easily be misunderstanding the posts in this thread, but is there or is there not a solution to the RTC battery issue for the revision 'z' TQFP-100 package variant?

Currently, I'm using a revision 'z' chip and upon power down, the entire chip continues powered up via battery. Is there a work-around to force the switch to power just the RTC?(Speaking of which, what was wrong with the revision 'A' implementation of PDR_ON anyway?)As it looks right now, I'm in the process of switching to the 144-pin version to get around this issue. Major work on PCB is required.best of wishes,MAJ