Two phase-shifted PUSH-PULL using HRTIM.

[APota.1]

Hello! I am trying to implement a phase-shifting full bridge on the STM32F334 microcontroller using HRTIM. Two PUSH-PULL outputs and a phase shift between them, this is necessary for the LLC converter.

I configured the master timer as an event source for timers A and B

Configured timer A and B as PUSH-PULL output.

Event source for setting the output of timers A and B MSTCMP1 and MSTCMP2.

By changing the value in MSTCMP2, I change the phase shift between timers A and B.

This works, but periodically when changing the value of MSTCMP2, I get a phase shift between phases of 180 degrees and not the one that set it. For example, instead of reducing power to 10% percent, I get 90%.

Do you know what you are doing or can help.

Code below:

 /* DLL calibration: periodic calibration enabled, period set to 14µs */

 HRTIM1->HRTIM_COMMON.DLLCR = HRTIM_CALIBRATIONRATE_14 | HRTIM_DLLCR_CALEN;

 /* Check DLL end of calibration flag */

 while(HRTIM1->HRTIM_COMMON.ISR & HRTIM_ISR_DLLRDY == RESET);

 /* ---------------------------------------------------------------- */

 /* Master timer initialization: */

 /* ---------------------------------------------------------------- */

 HRTIM1->HRTIM_MASTER.MPER = MULTIPHASE_PERIOD;

 HRTIM1->HRTIM_MASTER.MREP = REPETITON_RATE;

 HRTIM1->HRTIM_MASTER.MCR = HRTIM_MCR_CONT;

 /* Set compare registers for phase-shifts in master timer */

 /* Each compare is coding for the phase-shift of one phase */

 ///////////////////////////

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].PERxR = PHASE_PERIOD;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].REPxR = 0; // 1 ISR every REPETITON_RATE PWM periods

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].TIMxCR =HRTIM_TIMCR_PSHPLL;// +HRTIM_TIMCR_RETRIG HRTIM_TIMCR_PREEN + HRTIM_TIMCR_MSTU + ;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].RSTxR = HRTIM_RSTR_MSTCMP1;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].SETx1R = HRTIM_SET1R_MSTCMP1;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].RSTx1R = HRTIM_RST1R_CMP1;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].SETx2R = HRTIM_SET2R_MSTCMP1;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].RSTx2R = HRTIM_RST2R_CMP1;

 // TIMERB initialization: Idem Timer A

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].PERxR = PHASE_PERIOD;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].TIMxCR = HRTIM_TIMCR_PSHPLL + HRTIM_TIMCR_PREEN + HRTIM_TIMCR_MSTU + HRTIM_TIMCR_CONT; // HRTIM_TIMCR_RETRIG  +

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].RSTxR = HRTIM_RSTR_MSTCMP2;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].SETx1R = HRTIM_SET1R_MSTCMP2;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].RSTx1R = HRTIM_RST1R_CMP2;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].SETx2R = HRTIM_SET2R_MSTCMP2;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].RSTx2R = HRTIM_RST2R_CMP2;

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_A].CMP1xR = duty_c; // Set compare registers for duty cycle

   HRTIM1->HRTIM_TIMERx[HRTIM_TIMERINDEX_TIMER_B].CMP1xR = duty_c;

   HRTIM1->HRTIM_MASTER.MCMP1R = 100;

   HRTIM1->HRTIM_MASTER.MCMP2R = 100;

   HRTIM1->HRTIM_COMMON.CR2 |= HRTIM_CR2_MRST

                             + HRTIM_CR2_TARST

                             + HRTIM_CR2_TBRST;

 /* ---------------*/

 /* HRTIM start-up */

 /* ---------------*/

 /* Force register update before starting */

 HRTIM1->HRTIM_COMMON.CR2 |= HRTIM_CR2_TASWU

                           + HRTIM_CR2_TBSWU

                           + HRTIM_CR2_TCSWU

                           + HRTIM_CR2_TDSWU;

   HRTIM1->HRTIM_COMMON.OENR = HRTIM_OENR_TA1OEN | HRTIM_OENR_TA2OEN | HRTIM_OENR_TB1OEN | HRTIM_OENR_TB2OEN;

   /* Start HRTIM's TIMER A, B, C, D */

   HRTIM1->HRTIM_MASTER.MCR |= HRTIM_MCR_MCEN | HRTIM_MCR_TACEN | HRTIM_MCR_TBCEN;// | HRTIM_MCR_TCCEN | HRTIM_MCR_TDCEN;