2022-07-13 04:51 AM
Hi,
I have spent a few days trying to get the timers in sync, that is use one timer with multiple outputs; oc,PWM,base. I am generating a 1MHz clock for an external device. And then a start pulse. When the timer overflows ADC starts. It needs to be exactly x cycles after the pulse goes low.
Also I want to be able to stop the timers even after 1 iteration. The problem is that the first pulse is often longer or shorter. I tried using I PWM (triggered by a clk timer) for the start pulse and then timer callback but it's not in sync, and can't predict it. I can use one single PWM but if i use PWM pulse elapsed callback i only get the high length.
I will appreciate any tips.
2022-07-13 08:13 AM
I don't understand your description.
Try to draw a timing diagram, and indicate, how your solution is different from the expectation.
JW