Timer 16 bits is less stable than Timer 32 bits in PWM input mode

[ManhPham]

Hello everyone,

I read PWM input value by Timer 16 bits in Nucleo-F767ZI (combined channel mode), but the value that I received is not the same after some days.

For example, Day 1: PWM input value = 4200 but Day 4: PWM input value = 4000, no code changed, I keep the same code.

When I change from Timer 16 bits to Timer 32 bits, PWM input value that I read is very stable. So I don't think the PWM input wrong, I think the problem is from Timer 16 bits.

Only difference is Timer 16 bits with Prescaler = 10 (to avoid timer overflow), Timer 32 bits with Prescaler = 0.

I face to the same problem with ADC, if I change the ADC channel, then ADC value change as well (keep the same resolution).

My question: Could anyone help me read PWM input more stable by Timer 16 bits?

[Michal Dudka]

Check:
Your code - at 90% you have something wrong there
Your clock and its stability
External signal period/frequency/duty cycle with independent measurment

[Sarra.S · Accepted solution]

Hello @ManhPham, 

I think the change of the prescaler is the key here; a PSC of 10 divides the clock frequency by 11, which reduces the timer's resolution compared to a prescaler of 0, also the 16-bit timer may be more prone to overflow, which can cause instability in the readings

Depending on your clock frequency, and the frequencies range you want to measure, calculate the PSC-max and min you can use, and test it