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Strange behaviour when reading flash in FreeRTOS environment

JWill.11
Associate II

Dear community

I have a strange behaviour, when I want to read the flash of an STM32U5A9 in a FreeRTOS task. I have a function, that programs incrementing numbers on a whole flash page of 8 KB (confirmed with J-Mem, that programming worked). If I want to read the flash and copy its content to a buffer, it works sometimes, but most bytes read 0xFF:Buffer content after trying to read flash with content 0x00, 0x01, ..., 0xFE, 0xFFBuffer content after trying to read flash with content 0x00, 0x01, ..., 0xFE, 0xFF

I tried different methods of reading the bytes (memcpy of whole page, memcpy bytewise, directly accessing flash/buffer address), each resulting in the same behaviour.

If move the function call out of the task to run bare metal, it works as expected. Also if I execute line by line with the debugger. The task heap is also more than enough (assigned 40 KB, which have to mainly hold the TX and RX buffer with each 8 KB). Did someone experience the same or similar?

3 REPLIES 3
Bob S
Principal

How are you coordinating/single-threading access to that FLASH area?  I am not familiar with the STM32U5A9's FLASH layout.  Does it support dual-bank access?  How are you copying from FLASH into RAM - memcpy?

Right now, there is no coordination how the flash is accessed, as there is just a single thread. Later on, we manage it on the file system level.

STM32U5A9 supports dual-bank access according to the documentation (for the 4 MB version we use, it can't be set to single-bank mode).

I tried multiple methods of copying the bytes to the RAM. memcpy the whole range, memcpy bytewise and directly accessing the addresses.

Kraal
Senior III

I would suspect a cache issue (specifically D-cache), that is being reused by another task and cripple your readings.
Check for the STM32U5A9 datasheet page 25:

Maintenance operations for software management of cache coherency:
– Full cache invalidation (non interruptible)
– Address range clean and/or invalidate operations (background task, interruptible)