2023-11-13 05:05 PM
Hi,
I have two STM32L0 (slave) and STM32U585 (master) MCUs. I have no issue when Slave transmits data to Master. But, if Master transmits signal to Slave, it sends all the 9 clock pulses with address bits, but then the SCL remains low while SDA returns high.
I see my code hangs at this point and never continues, until I restart the MCU:
*/* Write data to TXDR */
hi2c->Instance->TXDR = *hi2c->pBuffPtr;*
This is located in HAL_I2C_Master_Transmit() function.
It seems to be a common issue with either STM32 or HAL libraries. Wondering if anyone could find a fix for that.
2023-11-13 05:31 PM
There's something confusing in your description. How the slave can transmit without the master addresses it first?
> my code hangs at this point and never continues
Please break into the debugger (click the "pause" icon). Where it will stop?
2023-11-13 07:50 PM
I pointed to two tasks I did
1- Master receive data from Slave => I had no issue with this part. Basically, Master provides clock and address to slave, then slave puts data right on the clock edges.
2- Master transmits data to Slave => This is expected to be much simpler. However, When my Master transmits clk and address successfully, it does not continue to transmit data. The SCL line remains low after 9 pulses (for address transmission) while SDA gets back to high.
When I pause the debugger, it stops at nowhere. Right after executing that line, I see described signals on my oscilloscope and the debugger hangs there.
From this testing and debugging, I can conclude that there are no hardware-related causes such as pull-up resistors, wiring, etc. Because the other direction works fine.
2023-11-14 08:51 AM
This sounds like a slave-side problem with writes.
2023-11-14 06:15 PM
Slave is receiving data only. I just have this command in my Master:
HAL_I2C_Master_Transmit(&hi2c3, (uint16_t)I2C_ADDRESS, (uint8_t *)aTxBuffer, 2, 100);
and this one in my Slave:
HAL_I2C_Slave_Receive(&hi2c1, (uint8_t *)aRxBuffer, 2, 100);
the problem is Slave is not blocked but my Master execution is totally blocked on that line and SCL line remains low.
Do you have any suggestion for debugging further? I tried different number of data, but it had no impact.