STM32U575 debug access

[Alexmouse]

I've built a new prototype using the STM32U575C, and provisioned two program/debug connectors, a fine pitch Samtec header and 0,1" pitch six pin header, I've used both before on STM32F4.

I've tried accessing the processor using both headers, an STLINK-V3SET and and old F4 Nucleo.

Neither can access the processor.

Is there something fundamentally different in the U5 parts that I've missed?

I've attached the schematic of my processor sheet.

[Uwe Bonnes]

As you have other post her, I assumw  this is not  your first STM32 design or did you work with the debugger before. I also assume you have checked all the voltages and the board for bad solder joints. Can you perhaps check with a scope, if MCU reacts on the debugger attach tries? Does your debugger eventually allow to spy on a very low level? Any reaction at all. If there is reaction, check signal integrity. If ther is no reaction, check your board again.

[Alexmouse]

I've mostly used STM32F4 in the past, with various debug headers and either an STLINK pod or the debugger off a Nucleo board. This is a new design following the same principles, just with a U5 part. Voltages are correct, I will double check my pin connections to see if I've done something silly. Always a nervous moment, the first connection to the processor on a new board design.

[MM..1]

Start with 6pin header pins 2,3,4 only ... Check if VBAT not require power.

[Alexmouse]

Ah, the datasheet says "If no external battery is used in the application, it is recommended to connect VBAT
externally to VDD with a 100 nF external ceramic decoupling capacitor."

This is my first mistake, I've fitted the capacitor but no connection to VDD. I'll fix that and see what changes.

[Alexmouse]

Okay, connecting Vbat to Vdd doesn't change the symptoms.

SWCLK, SWDIO and NRST buzz through from the 6 pin header to the chip pins, which match the CubeMX pin assignments.

[David Littell]

Is the core even running?  Have you tried to get the boot loader's attention at one of its ports?

How closely did you follow a known-working design like the U5 Nucleo?  What's your VDD?

[Alexmouse]

I've just checked Vcore, as I'm configured for SMPS, and there is 900mV present. 

[Alexmouse]

I've designed with reference to the datasheet and past STM32 experience, today I'll examine the Nucleo board schematics and look for potential errors. I've a Nucleo on order for further experimentation.

I'm relying upon the internal clocks as I'm pin limited and don't need precision clocks, I'm assuming the processor will default to using these?

I'm assuming basic debugger visibility in STLINK is the basic minimum interaction, how to tell what is happening inside the chip otherwise?

Vdd is 3.3 volts with SMPS generating Vcore.

[Alexmouse]

STLINK says:

12:10:17 : ST-LINK SN : 066CFF575450707267104359
12:10:17 : V2J43M28
12:10:17 : Connected via SWD.
12:10:17 : SWD Frequency = 100 KHz.
12:10:17 : Connection mode : Connect Under Reset.
12:10:18 : Can not connect to the target!
If you're trying to connect to an STM32W1xx device, please select Normal or HotPlug mode from Target->Settings menu.
12:10:19 : Unexpected error