STM32L476RG vs STM32L486QX HSE Ready bit

[savatage211]

Hi,

I am trying to port a software written for STM32L486QX to my STM32L476RG Nucleo board. I have made the board modifications as described in the User manual, except I adjusted the capacitor values for a 19.2 MHz clock. I ran a small program to printf to UART using the HSE clock and it worked, I also measured with a frequency counter and was getting the correct 19.2 MHz within the specified tolerance.

Now when I try to run the code written for the STM32L486QX it gets stuck in the loop where it's waiting for the HSE ready bit. Is there any difference as to the location of this bit for these two CPU's? Or is there something else that obviously jumps out? Thanks in advance for your answers

[waclawek.jan · Accepted solution]

> Is there any difference as to the location of this bit for these two CPU's?

Shouldn't be. I'm inclined to accuse your assertion:

> it gets stuck in the loop where it's waiting for the HSE ready bit

How do you know?

Doesn't the original use bypass mode (i.e. an external *oscillator* rather than *crystal*)?

JW

[savatage211]

by stepping through the program execution. Do you know for a fact that there is no such difference between these CPU's?

[waclawek.jan]

I am not ST.

Have you read out and checked the relevant RCC registers at the place where HSE should be already enabled?

Doesn't the original use bypass mode (i.e. an external *oscillator* rather than *crystal*)?

JW

[savatage211]

Closing this. There's no difference in the ready bit or pointers. Traced it to an incorrect debugger setting. Thanks for answering!