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STM32L1 GPIO pin configuration - Current leakage on pin with open-drain setup

Thanas Karapatis
Associate II


I have an STM32L151 mcu(application processor) and on its PB5 pin I have a peripheral (SARA-N3) connected. The requirements for the peripheral are that the pin is configured as an open drain output and is only used to pull it down for 1 second. The peripheral has an internal pull up to 1.1V and a max allowed voltage at 1.3V, however the mcu pin levels are at 3.6V. The mcu side is configured with no pull-up/pull-down resistor.



The problem I am having is that when the mcu goes in stop mode (low power), there is current leakage on that connection pin, i.e. PB5. 

- 1st attempt was to set that pin to output 1 and open drain. In theory, this should mean the pin should no be driven and keep the voltage of the peripheral(as observed), but had the current leakage.

- 2nd attempt was to enable the pull up on the mcu side. This had the effect to drive the pin to 2.7V which is not allowed by the peripheral pin and still there current leakage observed.

- 3rd attempt was to set the pin to analogic or input mode but the effect was the same as attempt 1

- 4th attempt was to disable the Schmidt trigger of the mcu pin. This improved a little bit but still not what I expect


My guess is that the voltage level of the pin compared to the voltage levels of the mcu pins is probable considered digital low and hence causing some FET to let current leak


 Is there any suggestion on how to configure the STM32L1 GPIO pin operating at 3.6V so that it does not leak current when the pin connected to has a voltage value of 1.1V?

Thanks in beforehand

Thanas Karapatis

Abel Sensors

Uwe Bonnes
Principal II

What is the leakage current? How does it compare with data sheet values? Did you consider to add an external transistor?

How do you measure that leakage current? What is the measured current's value?

 Is it present only if the mcu is in STOP mode?


Thanas Karapatis
Associate II

@Uwe Bonnes​

  • The current leakage is approximately 10uA.
  • Compared to other setups we should not have any leakage.
  • How should a resistor help ? When I enable the internal pull up of the mcu, the voltage level of the line goes to 2.7 but that is above spec for the peripheral (Edited)
  • Indeed a transistor could help, but for now it not an option to change the pcb layout and want to try and fix it in S/W

@Community member​ 

  •  I measured the current of peripheral itself, e.g. 3uA. I measured the current of the mcu without the peripheral 7uA. Then I connected the peripheral to the mcu and there was an additional current, it was 20uA instead of 10uA
  • It could also be present in other modes, but I am mainly interested in STOP mode as that is the state that is used most of the time

Okay, so you are not measuring pin *leakage* but increase in power supply current - that's a difference.

You would measure pin leakage by placing an ammeter (or sense resistor+voltmeter) between PB5 and application.

Nonetheless, at this point, we can't really help you more and you may want to contact ST directly, through FAE or through the web support form.


PS. Uwe suggested to use an external *transistor* rather than *resistor*, effectivaly to isolate PB5 from the pullup.

Thank you for clarifying the difference, I wasn't aware of the terms.

I am already in the process of the contacting a FAE, in the meantime I was hoping someone else had similar experience.

As for Uwe, indeed I misread. Indeed I was also thinking of something like this but this require modifying hardware and that is not an option at the moment.

Thank you a lot for replying