STM32H753ZI: Can ADC0, ADC1 & ADC2 be sampled simultaneously with same clock?

[RongShengWang]

Hi,

1. Can the selected input channels to ADC0, ADC1 and ADC2 in STM32H753ZI be sampled simultaneously under the same sampling clock?

2. NUCLEO-H753ZI ADC does not accept the analog negative signal inputs. Is there any STM32H7 dev board(s) accepting the analog negative signal inputs?

   Thanks,

[ELABI.1]

Hi @RongShengWang 

For the first question: If you want to use this application by using the Injected Simultaneous Mode with Dual ADC, you can refer to the reference manual RM0433, specifically Section 25.4.32 Dual ADC modes. Otherwise, if you want to use 3 ADCs simultaneously, you can use a timer to trigger the 3 ADCs.

For the second question: There are no STM32H7 development boards accepting the analog negative signal inputs.

Thanks,

ELABI.1

[RongShengWang]

Thanks, ELABI.1 - Yes, we only want to use all 3 ADCs simultaneously by using a timer to trigger the 3 ADCs.

    ADC 1, 2, 3 have total 60 channels. But only 36 different analog signals are allowed to be connected since there are 16 channels shared by all ADC 1, 2, 3, plus 8 unavailable channels.
    Question: What is the reason to have so many shared channels, which reduces the number of analog signals to be connected?

Thanks

Rong

[raptorhal2]

What is the reason to have so many shared channels,

My guesses:

1. For more flexibility in assigning channels to multiple ADCs converting at different frequencies.

2. Noise and real estate reduction. Routing to 60 pins would overlap more close proximity digital circuitry and use up more chip space.

Cheers

[RongShengWang]

Thanks again. Only one more question -

The datasheets (STM32H753ZI) says (P173) - "the VREF– s available only on UFBGA176+25 and
TFBGA240+25"  It shows the negative input exists in UFBGA176+25 and TFBGA240+25 packages" .
 Also the reference manual says -
   "In differential input mode, the analog voltage to be converted for channel “i” is the difference
between the external voltage VINP[i] (positive input) and VINN[i] (negative input"). So in the differential mode, it does allow the negative inputs.
  "In single-ended input mode, the analog voltage to be converted for channel “i” is the difference between the external voltage VINP[i] (positive input) and VREF- (negative input)." - Is VREF- a fixed value or a floating value? 
  Question:  Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal? (since VREF- is a fixed value in the single-end mode or floating value)?

Thank you very much!

Rong