Dear ST community,
What is my problem?
I’m having a very hard time to get the I2S communication between a STM32H745IIT and a CS4272 audio ADC/DAC running. The STM is the I2S master, the CS4272 is the slave.
What I am trying in the first place, is to send data via I2S, while reading out the I2S clock lines as well as the data line with a logic analyser. So the routing or functionality of my CS4272 doesn’t matter at first. Next to that, for now I don’t care about receiving I2S because then I have to consider hardware again….
It also tested ADC DMA without any success…
What is my goal?
Eventually I would like to receive and transmit data vie I2S DMA on one of the cores and process the data on the other core (there is a need for me to enable I and D cache on the second core for performance purposes, is that a problem regarding DMA?).
Behaviour in Hardware (via logic analyser)
While in blocking mode all (I2S) clocks are running and transmission is working, in full duplex mode with DMA the signals LRCK, SCLK and Din are dead, on the MCLK pin there is a 5.3 MHz clock signal from the STM32.
Behaviour in Software (via debug)
- No Error, Full or Half callback will be executed, the main loop is working.
- I2S2-Typedef says HAL_Unlocked, HAL_I2S_STATE_BUSY_TX_RX, Errorcode = 0
- Hdmarx says HAL_locked, HAL_DMA_STATE_BUSY, Errorcode = 0
- Hdmatx says HAL_Unlocked, HAL_DMA_STATE_READY, Errorcode = 1 (DMA transmit error)
What have I tried so far?
- I tried to change the linker script (place all in D1 domain) like described here https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices
- I tried to reorder the prewritten init functions like described here https://community.st.com/s/question/0D50X0000BsRQmQSQW/stm32h7-i2s-dma-using-hal-firmware-15-troubleshoot
- I tried to freestyle SRAM enabling (doesn’t look too safe for me) like described here https://electronics.stackexchange.com/questions/389830/tim2-dma-configuration-for-stm32h7
- I tried to enable the DMA clock by myself (__HAL_RCC_DMA1_CLK_ENABLE()) like described here https://www.youtube.com/watch?v=ToRk2lOhydo
- I changed the I2S mode to I2S_MODE_MASTER_FULLDUPLEX in init (cubemx bug).
I hope this list of possible I2S bugs can help somebody in the future! Anyway it would be great if anybody could help me with this problem or give me a tip on how to solve this. Also sorry in advance if there are some nasty beginners mistakes, you have to know this is my first time to work with a H7 dual pain processor….
I would be super happy to hear from you guys, this problem is killing my mood for three weeks straight!
Best regards
Lorezn
Important parts of main.c
uint16_t rxBuf[4];
uint16_t txBuf[4];
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
// RCC->AHB2ENR |= (0x7 << 29);
/* USER CODE END 1 */
/* USER CODE BEGIN Boot_Mode_Sequence_0 */
int32_t timeout;
/* USER CODE END Boot_Mode_Sequence_0 */
/* USER CODE BEGIN Boot_Mode_Sequence_1 */
/* Wait until CPU2 boots and enters in stop mode or timeout*/
timeout = 0xFFFF;
while((__HAL_RCC_GET_FLAG(RCC_FLAG_D2CKRDY) != RESET) && (timeout-- > 0));
if ( timeout < 0 )
{
Error_Handler();
}
/* USER CODE END Boot_Mode_Sequence_1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN Boot_Mode_Sequence_2 */
/* When system initialization is finished, Cortex-M7 will release Cortex-M4 by means of
HSEM notification */
/*HW semaphore Clock enable*/
__HAL_RCC_HSEM_CLK_ENABLE();
/*Take HSEM */
HAL_HSEM_FastTake(HSEM_ID_0);
/*Release HSEM in order to notify the CPU2(CM4)*/
HAL_HSEM_Release(HSEM_ID_0,0);
/* wait until CPU2 wakes up from stop mode */
timeout = 0xFFFF;
while((__HAL_RCC_GET_FLAG(RCC_FLAG_D2CKRDY) == RESET) && (timeout-- > 0));
if ( timeout < 0 )
{
Error_Handler();
}
/* USER CODE END Boot_Mode_Sequence_2 */
/* USER CODE BEGIN SysInit */
txBuf[0] = 0;
txBuf[1] = 4095;
txBuf[2] = 16383;
txBuf[3] = 32767;
rxBuf[0] = 0;
rxBuf[1] = 0;
rxBuf[2] = 0;
rxBuf[3] = 0;
//__HAL_RCC_DMA1_CLK_ENABLE();
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_ADC1_Init();
MX_I2S2_Init();
/* USER CODE BEGIN 2 */
HAL_I2SEx_TransmitReceive_DMA(&hi2s2, (uint16_t *)txBuf,(uint16_t *)rxBuf, 4);
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
HAL_Delay(50);
__NOP();
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
}
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
/* DMA1_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
}
static void MX_I2S2_Init(void)
{
/* USER CODE BEGIN I2S2_Init 0 */
/* USER CODE END I2S2_Init 0 */
/* USER CODE BEGIN I2S2_Init 1 */
/* USER CODE END I2S2_Init 1 */
hi2s2.Instance = SPI2;
hi2s2.Init.Mode = I2S_MODE_MASTER_TX;
hi2s2.Init.Standard = I2S_STANDARD_PHILIPS;
hi2s2.Init.DataFormat = I2S_DATAFORMAT_16B;
hi2s2.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
hi2s2.Init.AudioFreq = I2S_AUDIOFREQ_44K;
hi2s2.Init.CPOL = I2S_CPOL_LOW;
hi2s2.Init.FirstBit = I2S_FIRSTBIT_MSB;
hi2s2.Init.WSInversion = I2S_WS_INVERSION_DISABLE;
hi2s2.Init.Data24BitAlignment = I2S_DATA_24BIT_ALIGNMENT_RIGHT;
hi2s2.Init.MasterKeepIOState = I2S_MASTER_KEEP_IO_STATE_DISABLE;
if (HAL_I2S_Init(&hi2s2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN I2S2_Init 2 */
hi2s2.Init.Mode = I2S_MODE_MASTER_FULLDUPLEX;
/* USER CODE END I2S2_Init 2 */
}
