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STM32H743 + QSPI for AD7616

wqw.1
Associate II

My development environment is stm32cubeMX and IAR.

1.Init QSPI

2.Read data via QSPI

if the DummyCycles = 0,the program is running abnormally.


_legacyfs_online_stmicro_images_0693W00000dK0VFQA0.pngif the DummyCycles over 2,the program is normally.

int main(void)

{

 /* USER CODE BEGIN 1 */

 /* USER CODE END 1 */

 /* MPU Configuration--------------------------------------------------------*/

 MPU_Config();

 /* MCU Configuration--------------------------------------------------------*/

 /* Reset of all peripherals, Initializes the Flash interface and the Systick. */

 HAL_Init();

 /* USER CODE BEGIN Init */

 /* USER CODE END Init */

 /* Configure the system clock */

 SystemClock_Config();

 /* USER CODE BEGIN SysInit */

 /* USER CODE END SysInit */

 /* Initialize all configured peripherals */

 MX_GPIO_Init();

 MX_QUADSPI_Init();

 /* USER CODE BEGIN 2 */

  

 /*Read Data Via Qspi*/

 uint8_t aucBuf[2];

 QSPI_ReadRegEx(aucBuf, 2);

 /* USER CODE END 2 */

 /* Infinite loop */

 /* USER CODE BEGIN WHILE */

 while (1)

 {

  /* USER CODE END WHILE */

  /* USER CODE BEGIN 3 */

 }

 /* USER CODE END 3 */

}

uint8_t QSPI_ReadRegEx(uint8_t *_pBuf, uint16_t _usReadSize)

{

  QSPI_CommandTypeDef sCommand = {0};

  sCommand.DummyCycles = 0;                /* �?需�?空周期 */

  sCommand.InstructionMode  = QSPI_INSTRUCTION_NONE;   /* No instruction */

  sCommand.AddressMode = QSPI_ADDRESS_NONE;        /* No address ;QSPI_ADDRESS_1_LINE */

  sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE; /* 无交替字节 */

  sCommand.DataMode  = QSPI_DATA_1_LINE;         /* 1线数�?�方�? */

  sCommand.NbData   = _usReadSize;           /* 写数�?�大�? */

  sCommand.DdrMode      = QSPI_DDR_MODE_DISABLE;   /* �?支�?DDR */

  sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY; /* DDR模�?,数�?�输出延迟 */

  sCommand.SIOOMode     = QSPI_SIOO_INST_EVERY_CMD;  /* 仅�?��?一次命令 */

  if(HAL_QSPI_Command(&hqspi, &sCommand, 5000) != HAL_OK)

  {

    return 0;

  }

  if(HAL_QSPI_Receive(&hqspi, _pBuf, 5000) != HAL_OK)

  {

    return 0;

  }

  return 1;

}

1 ACCEPTED SOLUTION

Accepted Solutions
KDJEM.1
ST Employee

Hi @wu qw​ ,

Are you using the indirect read mode?

It is mentioned in the errata sheet ES03932, for the STM32H743 MCU , when the QUADSPI is configured in Indirect read with only the data phase activated (in Single, Dual, Quad or Dual-quad I/O mode), the QUADSPI peripheral hangs and the BUSY flag remains of the QUADSPI_SR register remains high. An abort must be performed to reset the BUSY flag and exit from the hanging state.

Workaround: Insert a dummy phase with at least two dummy cycles

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

3 REPLIES 3
KDJEM.1
ST Employee

Hello @wu qw​  and welcome to the Community :) ,

Some memories require a certain number of dummy cycle for read or write correctly.

I think in your case, this memory necessities a 2 dummy cycle for read.

For that it is necessary to refer to the memory datasheet to determine the number of dummy cycles for read.

When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.

Kaouthar 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Thanks for your reply!

My application uses qspi to communicate with the AD7616 chip,read registers without the need for a dummy cycle。If I increase the dummy cycle, the received data will be abnormal。


_legacyfs_online_stmicro_images_0693W00000dK1DRQA0.png​When the dummy cycle set 0, the application freezes and needs to be powered off and restarted to emulate。


_legacyfs_online_stmicro_images_0693W00000dK1HeQAK.png

KDJEM.1
ST Employee

Hi @wu qw​ ,

Are you using the indirect read mode?

It is mentioned in the errata sheet ES03932, for the STM32H743 MCU , when the QUADSPI is configured in Indirect read with only the data phase activated (in Single, Dual, Quad or Dual-quad I/O mode), the QUADSPI peripheral hangs and the BUSY flag remains of the QUADSPI_SR register remains high. An abort must be performed to reset the BUSY flag and exit from the hanging state.

Workaround: Insert a dummy phase with at least two dummy cycles

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.