2025-09-25 2:43 AM - last edited on 2025-09-25 4:11 AM by mƎALLEm
I am using STM32H723 and have implemented WWDG. Below is my configuration:
Are there possibility that when the system resets due to watchdog it would not trigger its ISR.
Solved! Go to Solution.
2025-10-06 4:31 AM - edited 2025-10-06 4:33 AM
For now I am using a timer to refresh the WWDG when file transfer is happening and it is working fine. But couldn't figure out the reason behind the above mentioned unusual condition.
2025-09-25 4:22 AM
Not sure, never used WWDG, but why not
NVIC_DisableIRQ(WWDG_IRQn);
?
2025-09-25 6:21 AM
The EWI interrupt will function as intended.
There exist scenarios in which it will not be called. For example, if interrupts are disabled, it won't be called.
2025-09-25 11:03 PM
@TDK I am not disabling its interrupts. Even if I disable the interrupt it will still reset but without triggering its ISR
2025-09-26 4:10 AM
> Are there possibility that when the system resets due to watchdog it would not trigger its ISR.
...
> Even if I disable the interrupt it will still reset but without triggering its ISR
Isn't that what you asked for? Scratch head...
2025-09-26 6:04 AM
Show your code.
2025-10-03 5:56 AM - edited 2025-10-03 5:59 AM
@TDK I am using FREERTOS and have a 2 tasks running. Task A looks out for the messages coming from the TCP server and acts accordingly. For OTA when the TCP client (my module) I do this:
case BLE_Command_Request_OTA :
if(BLE_Request_OTA() != 0)
{
char str[50];
uint16_t count = 0;
HAL_TIM_Base_Stop(&htim3);
HAL_TIM_Base_Stop(&htim15);
HAL_TIM_Base_Stop(&htim16);
HAL_TIM_Base_Stop(&htim1);
HAL_NVIC_DisableIRQ(EXTI9_5_IRQn); //Z
HAL_NVIC_DisableIRQ(ADC_IRQn); //ADC
HAL_NVIC_DisableIRQ(TIM3_IRQn); //ENCODER
HAL_NVIC_DisableIRQ(TIM1_UP_IRQn); //5 mS Timer
Flag_BLE_Enable = 0;
Flag_BLE_Read_ON = 0;
Read_Input_Group_Mode = 0;
Flag_BLE_Graph_ON = 0;
Flag_Job_Name_Received = 0;
uint16_t temp_loop = 0,ref_count = 0;
//Time around 2 sec so that any ongoing process gets completed
for(ref_count = 0; ref_count < 10; ref_count++)
{
count = (hwwdg1.Instance->CR & 0x7F);
for(temp_loop = 0; temp_loop <200; temp_loop++)
{
osDelay(1);
}
sprintf(str, "Count: %d\n", count);
Send_String_UART_232((uint8_t*)str);
HAL_IWDG_Refresh(&hiwdg1);
HAL_WWDG_Refresh(&hwwdg1);
}
alt_second_ms = 0;
Flag_Time_Second = 0;
//Making All Digital Outputs Idle
HAL_GPIO_WritePin(DO_1_GPIO_Port, DO_1_Pin,Pulse_Level_Idle);
HAL_GPIO_WritePin(DO_2_GPIO_Port, DO_2_Pin,Pulse_Level_Idle);
HAL_GPIO_WritePin(DO_3_GPIO_Port, DO_3_Pin,Pulse_Level_Idle);
HAL_GPIO_WritePin(DO_4_GPIO_Port, DO_4_Pin,Pulse_Level_Idle);
HAL_GPIO_WritePin(DO_5_GPIO_Port, DO_5_Pin,Pulse_Level_Idle);
HAL_GPIO_WritePin(DO_6_GPIO_Port, DO_6_Pin,Pulse_Level_Idle);
HAL_GPIO_WritePin(DO_7_GPIO_Port, DO_7_Pin,Pulse_Level_Idle);
HAL_GPIO_WritePin(DO_8_GPIO_Port, DO_8_Pin,Pulse_Level_Idle);
Flag_DMA_ON = 0;
File_Name_Send_String();
// Send_New_Data(Resp_Bytes,Resp_Length);
BLE_Push_Data_DMA_Tx_Buffer(Resp_Bytes,Resp_Length); //Added 30.09.25
for(temp_loop = 0; temp_loop < 100; temp_loop++)
{
osDelay(1);
}
Transmit_Page_ID(Page_OTA);
Flag_OTA_Request_Received = 1;
temp_loop = 0;
while(1)
{
temp_loop++;
if(temp_loop >= 250)
{
temp_loop = 0;
count = (hwwdg1.Instance->CR & 0x7F);
HAL_GPIO_TogglePin(LED_RED_GPIO_Port,LED_RED_Pin);
// //Refresh @ everey 250 mS
sprintf(str, "WD: %d\n", count);
Send_String_UART_232((uint8_t*)str);
HAL_IWDG_Refresh(&hiwdg1);
HAL_WWDG_Refresh(&hwwdg1);
}
osDelay(1);
}
}
break;
Here WD is printed couple of times and my system resets due to watchdog without its ISR being triggered. In he other tasks I initialize TFTP client as the file transfer is done using TFTP.
2025-10-06 12:39 AM
I had a doubt about RTOS blocking the WWDG ISR. So I have implemented without RTOS and the issue persists.
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MPU Configuration--------------------------------------------------------*/
MPU_Config();
/* Enable the CPU Cache */
/* Enable I-Cache---------------------------------------------------------*/
SCB_EnableICache();
/* Enable D-Cache---------------------------------------------------------*/
SCB_EnableDCache();
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_USART3_UART_Init();
MX_TIM24_Init();
MX_LWIP_Init();
MX_WWDG1_Init();
/* USER CODE BEGIN 2 */
HAL_UART_Transmit(&huart3, "OS Starts\n", 10, 10);
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
HAL_WWDG_Refresh(&hwwdg1);
HAL_GPIO_TogglePin(GPIOB, LED_GREEN_Pin);
MX_LWIP_Process();
if(!FLAG_OTA)
{
if((FLAG_LINK) && (!FLAG_TCP_CONNECTED))
{
tcp_client_init();
}
}
else
{
if(!FLAG_TFTP_CON)
{
HAL_UART_Transmit(&huart3, "TFTP\n", 5, 5);
tftp_init_client();
// HAL_Delay(10);
}
if(FLAG_TFTP_CON) { if(!OACK_RECV) { send_rrq_periodic(); } }
if(Flag_TFTP_Error) { HAL_UART_Transmit(&huart3, "ERROR\n", 6, 5); /*NVIC_SystemReset();*/ }
if(Flag_FILE_RECVED)
{
uint32_t t_buf[1] = {tsize};
if(FLASH_If_Erase(ADDR_FLASH_SECTOR_7_BANK1, 1) == FLASHIF_OK)
{
if((FLASH_If_Write(ADDR_FLASH_SECTOR_7_BANK1, t_buf, 1)) != FLASHIF_OK)
{
strcpy(debug_string, "\r------>ERROR: Writing file size in flash<------\n");
HAL_UART_Transmit(&huart3, (uint8_t*)debug_string, strlen(debug_string), 10);
}
}
Flag_FILE_RECVED = 0;
// NVIC_SystemReset();
}
}
HAL_Delay(100);
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
This is what was printed in my log:
2025-10-06 4:31 AM - edited 2025-10-06 4:33 AM
For now I am using a timer to refresh the WWDG when file transfer is happening and it is working fine. But couldn't figure out the reason behind the above mentioned unusual condition.