STM32H7 , Very slow processing time ?

[A.Caliskan]

Hello, i am using stm32h723zg nucleo board in my project. my system clock frequency 480 MHZ, that means it does an instruction for about 2,08 ns as well but the time i measure

9-10 ns , That's too much.(application ; Writing adc value to another variable in an adc interrupt.)

 

[A.Caliskan]

[Danish1]

Only you can say what's too slow for a specific application.

But I do have some comments:

1. Your measurement gives the time of accessing the ADC data-register and updating the GPIO pin. To know how long the ADC access takes, you need to compare that pulse with one that just updates the GPIO pin.
2. You are not measuring some huge overheads associated with interrupts. The processor has to dump a few registers onto the stack, fetch the interrupt vector to know where ADC_IRQHandler is, and then fetch the machine-code from ADC-IRQHandler. And that's not likely to be in the cache so you'll generally have a few cycles of wait-states. If you want to avoid all of this, you need to use DMA to read the ADC.
3. Why is it so very important to read the ADC very quickly? How does this duration compare with how quickly the ADC generates fresh values
4. If you are reading the ADC very quickly, you need to think about what to do with all the readings. That generally takes much longer than the act of reading a single value even if all you're doing is taking the average.

Hope this helps,

Danish

[Tesla DeLorean]

Isn't the whole point of BSRR that you can blind write it?

Check the clock settings, and speed of the bus the GPIO is on.​

Check optimization settings.

Perhaps measure clocks with DWT CYCCNT?​

[A.Caliskan]

thank u , your ansver. I think u misunderstood me, I measure GPIO Set-reset

approximately 60-70ns takes time so "sina=ADC2->DR" ,means it takes 30 ns

,it(sina=ADC2->DR) is 2 instraction so 1 instruction is 15ns and frequency is 66MHZ

But my mcu frequency is 480 MHZ ... i don't understand this case.

[A.Caliskan]

I checked what you said

[waclawek.jan]

This is not an 8-bit microcontroller with tight uniform timing across the whole chip; rather, it's an SoC with all its complexity resulting in complex timing.

In 'H7, ADC2 is on AHB1, which is slave on the D2 AHB bus matrix. The read command of ADC->DR from processor has to traverse through the AXI matrix to the D1-to-D2 bus, there through the D2 AHB matrix to the AHB1 bus, and then the read out data have to traverse back. This all involves arbitration latencies and resynchronizations (and D2 runs at max. 240MHz). So, executing the 2 instructions may have taken 2 system clocks, but then there was an extra dozen of clocks to perform the actual read.

The high clock provides only computational power, it won't handle peripherals magically fast.

JW

[Danish1]

What Tesla DeLorean meant was you don't need to the read part of

GPIOA->BSRR |= 0x00010000;

It's faster to do (and has exactly the same effect)

GPIOA->BSRR = 0x00010000;

[A.Caliskan]

i understand it, but this time is very big,,, because ı try same code with stm32f4 so stm32f4 faster than stm32h7 ,, I'm so confused because of this

[waclawek.jan]

> ı try same code with stm32f4 so stm32f4 faster than stm32h7

That's exactly what I am talking about. 'H7 is good for crunching numbers, making huge calculations, playing with pictures i.e. data which stay within the AXI domain. It is worse than 'F4 in handling peripherals.

Try to offload as much real work as possible to hardware, i.e. DMA, automatic functions of hardware etc.

JW