I am trying to create a repeating trigger to start an SPI transfer to read 12 x 16 bit values from an external ADC.
I have configured the SPI with a Rx DMA to receive the data and have created a timer to trigger a second DMA to write to the SPI->CR1 register setting the CSTART bit.
However, the SPI transfer only occurs once, even though the timer event is occurring periodically (every 1s for testing purposes).
Reading the manual I understand that CSTART bit get cleared when the transmission is complete:
"Bit 9 CSTART: master transfer start
This bit is set by software to start an SPI or I2S/PCM communication. In SPI mode, it is
cleared by hardware when End Of Transfer (EOT) flag is set or when a transaction suspend
request is accepted."
I have read elsewhere that this has been achieved using interrupt service routines but that is not a option for me, it must be achieved without interrupts/callback routines.
Is what I am trying to do even possible?
You can definitely do this with timers. Set up a master timer with period 1s. Set up a second timer in gated mode to only run when ch1 is high. Set master timer ch1 and slave timer such that it updates 12 times in each period of the master timer. Use that trigger to send a byte to SPI->TX. Use RXNE flag to trigger a read/store from SPI->RX.
Might also be a way with CSTART but not as familiar with that.