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I am trying to understand how the ECC IRQs work.  I have configure the RAMECC1 AXI SRAM, RAMECC2 SRAM1, 2 and 3, and RAMECC3 SRAM 4 monitor CR registers to generate interrupts on double bit errors.  I have configured the IER so that Global interrupts...
I understand that ADC Linear Calibration is performed during device production and the values stored in the System Memory.However, I have been unable to find any documentation on where the 6 values are stored.Also, are their 6 values per ADC device (...
I'm using the HAL drivers to configure ADC1 Channel 3 as Differential and Channel 4 as Single Ended.According to the reference manual (Figure 143) when ADC1 Channel 3 is differential, it is Channel 7 that becomes unavailable as it is used as INN3.  T...
I'm using an STM32H745 and have developed the Boot code, which works as expected when built as part of an application.  However, having converted the Boot code to a static library and linked it into the same application the Boot startup section .isr_...
I am trying to create a repeating trigger to start an SPI transfer to read 12 x 16 bit values from an external ADC.I have configured the SPI with a Rx DMA to receive the data and have created a timer to trigger a second DMA to write to the SPI->CR1 r...
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