Assuming that STM32H7 is configured as a clock slave with IEEE1588v2 (LAN8742A as PHY), can the received/sync'd clock signal be fed into the internal clock tree to produce 32.768MHz clock output?
If so, do any signals need to be routed from one ball to another?
I have seen this done on NXP i.MX6 series processors with an ENET_EVENT pin routed to a general-purpose timer capture pin, but wondering if something similar needs to be done for STM32H7 series.
