STM32H7 hrtimer example(s)

[dejan]

Are there some working hrtimer examples for STM32H7 floating around?

[Mikhail Z]

That is interesting. Now the question is if the signal is clean and stable at those frequencies. I should be able to see till about 2GHz on my scope, i'll try to check it.

Do you use rev Y or V of the chip?

[dejan]

Chip version register is 0x2003. Again - I am using relatively simple configuration, where I generate two signals in anti-phase with dead time, using single timer and two outputs. My Nucleo board does not have crystal mounted, so I use internal 64Mhz RC oscillator as a reference - therefore it's inherently not very stable, but nevertheless everything works as it should.

[Mikhail Z]

Can you attach the code used?

[dejan]

Here's the code. This one uses TimerA and TimerB, where period registers are programmed with 3200 and 3201. CHA1 (PC6) and CH2B (PA8) are programmed to generate squarewave outputs. You should get 4.0Mhz on PC6 and 3.998750MHz on PA8.

[Vincent Onde]

​Hello,

There is no multiplier in this MCU, but I agree the timer behaves as if the clock was multiplied.

It is actually dithering between adjacent values. This is not visible with a 100MHz scope, but the minimum resolution you'll get is always 2.5ns (at 400MHz), whatever the prescaler. The interesting point you've noticed is that in average, the frequency resolution will be much finer. The average is over 32 periods, or  16 periods,... depending on the clock prescaler value. It applies also for duty cycle, to some extend: for some frequencies, the dithering will not work. This is one of the reasons why this operating mode is reserved in the spec.

Congratulations anyway for your findings and analysis!

Best regards,

Vincent

[dejan]

Yes, I understand that there's no multiplier, but it's a pity ST did not explain in detail how that "multiplying" works - and that applies to other families that have HIRES timer.

[waclawek.jan]

There's no multiplier in the models where HRTIM does have the sub-ns resolution, either ('F334, 'G474). Instead, the outputs are appropriately shifted by a delay line with selectable output taps. 'H7 probably does not have this delay line implemented.

The HRTIM chapter for those models sort of says this, but then blurs it with the (factually incorrect, but marketingly better) talks about multipliers and gigahertzs.

JW

[Mikhail Z]

I measured the average period and StDev for 10k samples with prescaler=0. When the period was set to 320 clk (25ns), I measured 24.963ns (StDev=110ps). With period set to 321 clk, measured average was 25.049ns (StDev=481ps).

So it looks like the average really can be set with 12.8GHz resolution given sufficiently high number of samples, but if the period is not a multiple of 2.5ns the clock is unstable.

[dejan]

Well, aside from these results - what I meant is that HIRES timer on H7 looks very similar (if not the same ) as the one on F3 family, but for some reason ST decided to cut it out from the specs & ref. manual (even HIRES cookbook states that H7 has no DLL, but it's obviously there).

[Mikhail Z]

Why do you think H7 has DLL? The clock is dithering when it is not a multiple of 2.5ns. Is that how the DLL output should look like?