STM32H5 PSSI RDY pin setup and hold times verification

Michal Dudka · ‎2025-01-23

Hi,

STM32H533 datasheet (DS14539 Rev 2) in table 88 says that RDY input setup and hold time are both 0.5ns. From my naive point of view it looks like superb value (RDY have to be stable only +-0.5ns around CLK edge). Isn't that a typo ? (STM32H7 PSSIs hold time is about 5.5ns)

Thanks,
Michal Dudka

SofLit · ‎2025-01-23

Hello,

I'm checking internally if it's the same timing as STM32H7R/S product.

Most probably the issue is on "RDY input hold time" timing (need to check).

From STM32H7S datasheet:

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