2020-10-21 10:50 PM
I need to detect if there is a comparator state change inside a PWM pulse. I want to look for this a little after the PWM rising edge and stop before the PWM falling edge.
The PWM is running in center aligned mode.
RM0440, Rev 4, STM32G4 Reference manual:
1) Page 884 last paragraph says: "Whenever the roll-over event is used for blanking or windowing, the ROM[1:0] programming applies for defining when it is generated"
2) Page 894 first bullet says: "In up/down mode (UDM bit set to 1), the counter reset event is defined as per the ROM[1:0] bit setting.
Section 27.5.49, page 1028 defines ROM[1:0]. It says for case
00: Event generate when the counter is equal to 0 or to HRTIM_PERxR value
01: ...
Let's say I program:
Period to 1000, PWM to 400 and compare 1 to 500. This means from 0 to 400 the PWM output is low, from 400 up to 1000 down to 400 the PWM output is high and then from 399 to 0 the PWM output is low. I want the blanking window to be open between 500 up to 1000 down to 500.
I then program EE1FLTR[3:0] in HRTIM_EEFxR1 (page 999) to:
0001: Blanking from counter reset/roll-over to compare 1
If program ROM[1:0] to 00. Will I get:
A) Blanking from 0 to 499 and the no blanking from 500 up to 1000 down to 500 and then blanking from 499 down to 0
or
B) Blanking from 0 to 499 and the no blanking from 500 up to 1000. Then blanking from 999 down to 500 and then no blanking from 499 down to 0?
It must be A otherwise, this is a bug and a terrible implementation.
Can I please get clarification of the behavior of blanking (and windowing) in up/down mode for the different ROM[1:0] and EE1FLTR[3:0] settings?
I've attached a PDF file with the relevant portions from the manual.
Solved! Go to Solution.
2020-11-09 08:50 AM
Hello @Singh.Harjit ,
The filtering modes with EE1FLTR[3:0] = 0001 and 0011 are indeed not adequate for Up/Down mode (and the behavior when UDM=1 is not described for this reason, even if nothing prevents these modes).
With ROM[1:0], the behavior corresponds to the B/ case you've described.
With ROM[1:0] = you would have Blanking from 0 to 500 only
With ROM[1:0] = you would have Blanking from 499 to 0 only
The filtering modes EE1FLTR[3:0] = 0010 and 0100 are suited for up-down mode to implement a leading-edge blanking, , assuming this is only necessary during the first half of the pulse.
For your application, did you consider the centered windowing mode EE1FLTR[3:0] = 1111?
If CMP2=CMP3 = 500, you’ll let the comparator event pass through from 500 to 1000 up and then 999 down to 500 down.
This seems to correspond to the use case you’re describing, does it?
Best regards,
Vincent
2020-11-05 07:48 AM
Hello @Singh.Harjit,
Your request is already shared internally, we will get back to you.
Regards
Imen
2020-11-09 08:50 AM
Hello @Singh.Harjit ,
The filtering modes with EE1FLTR[3:0] = 0001 and 0011 are indeed not adequate for Up/Down mode (and the behavior when UDM=1 is not described for this reason, even if nothing prevents these modes).
With ROM[1:0], the behavior corresponds to the B/ case you've described.
With ROM[1:0] = you would have Blanking from 0 to 500 only
With ROM[1:0] = you would have Blanking from 499 to 0 only
The filtering modes EE1FLTR[3:0] = 0010 and 0100 are suited for up-down mode to implement a leading-edge blanking, , assuming this is only necessary during the first half of the pulse.
For your application, did you consider the centered windowing mode EE1FLTR[3:0] = 1111?
If CMP2=CMP3 = 500, you’ll let the comparator event pass through from 500 to 1000 up and then 999 down to 500 down.
This seems to correspond to the use case you’re describing, does it?
Best regards,
Vincent
2020-11-09 09:19 PM
@Vincent Onde Thank you for the response and information.
I wanted to use CMP3 for another purpose but if it is the only way, then, I'll use CMP3.