STM32G0B0 FLASH memory, page numbers, reference manual error?

[yo3hcv]

I work on STM32G0B0. This picture is correct from reference manual?

For BANK1 appears to be correct, but for BANK2, numbering starts from 256 to 383 which I guess id wrong. Shall be 128...255.

Asking because also FLAHSH->CR, PNB appears to be wrong too.

 

Can some ST employee clarify this?

Thanks!

[Aime]

Hi @yo3hcv​ ,

Yes we have noticed this issue on the documentation both banks are in series, so for the 512K :

BANK1 : page 0 to 127

BANK2 : page 128 to 256

This should be fixed on the new version of the reference manual.

Thanks again for you contribution 😉.

Best regards,

A.MVE

[Aime]

I reported this issue internally, ticket number: 151727 (This is an internal tracking number and is not accessible or usable by customers).

Best regards,

A.MVE

[GwenoleB · Accepted solution]

Dear @yo3hcv​,

This table below reflects how page number works on G0 dual/single bank capability as it depends of nSWAP_BANK option bit.

Following this table, make sure your software is aligned. Here below an example to erase a page located into the Bank2, two points are mandatory:

• Set a page number within PNB range (0-127)
• Set the BKER bit to select the Bank2

HAL_FLASH_Unlock();
  FLASH_EraseInitTypeDef EraseInitStruct = {0};
  EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
  EraseInitStruct.Banks       = FLASH_BANK_2;              
  EraseInitStruct.Page        = 127;               
  EraseInitStruct.NbPages     = 1;
  if (HAL_FLASHEx_Erase(&EraseInitStruct, &PageError) != HAL_OK)
  {
    
  }
  HAL_FLASH_Lock();

Best regards,

Gwénolé

[yo3hcv]

Hello Gwénolé,

Not quite accurate, nSWAP has nothing to do with layout, however, your pages numbering are correct.

Should I pay extra for correct documentation on ST micros? Joking.... 😉

I spent another 2 days to figure out that...

This is the RM I have from your website

https://www.st.com/resource/en/reference_manual/rm0454-stm32g0x0-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

To be honest, the correct, technical english shall be super simple as that:

STM32G0B0:

• 2048 bytes sectors regardless BANK configuration
• DUAL_BANK or nSWAP or whatever are NOT affecting memory layout
• DUAL_BANK is simply solving the bus stall topics
• nSWAP is simply swapping the BANKs so device will see the same memory area

Now for ERASE pages (sectors), one shall simply

• use PNB as 0..127, any other value will wrap around and erase in the same area !!!
• PNB is implemented as 7 bits only (mask 7F not 17F like in RM) !!!
• BKER will select proper BANK all the time !!!

Examples

BKER=0, PNB=5    -> 0x8002800    (sector 5 from BANK1)

BKER=0, PNB=127  -> 0x803F800    (sector 127 from BANK1)

BKER=1, PNB=5    -> 0x8042800    (sector 5 from BANK2)

BKER=1, PNB=127  -> 0x807F800    (sector 127 from BANK2)

PS.

I think who wrote the RM was some kind of VisualBasic guy... BANK 1/2 makes more sense as BANK 0/1. And please remove that "page 256...383" info from RM, you are confusing people !!!

Thanks!

Edi

[yo3hcv]

Also please fix the STCube Programmer too 

If you de-select DUAL_BANK will show 4k sectors which is wrong

For DUAL_BANK will show correct 2k sectors, but with the same crap numbering, jumping to 256 ???

 

[GwenoleB]

Hello @yo3hcv​,

You are right. nSWAP_BANK is available on STM32Gx1 Series and not on Value line STM32G0B0.

Moreover, PNB is indeed 7-bit wide and will be updated in next RM revision of RM0444 & RM0454.

To be more precise, PNB register is common to both memory cut while BKER bit is impacted by nSWAP_BANK and DUAL_BANK bit (for STM32G0x1 devices only).

BKER = 0 ==> BANK mapped at 0x0800_0000 is selected

BKER = 1 ==> The other BANK is selected

However, I'm taking notes based on your feedback to update in clearer way the Reference Manual. It will be the same for CubeProgrammer which needs to be aligned with Reference Manual.

Best Regards,

Gwénolé