STM32G030K6T6 ADC_DMA

[Sudhakar.R]

Hi,

I'm trying to configure the ADC DMA with STM32G030K6T6. But Analog value is not came.

below I given my code and i don't know where i made a mistake if any one know help me.

void ADC_Config(void)
{
	RCC->APBENR2 |= RCC_APBENR2_ADCEN;  // ADC clock enable
	RCC->AHBENR |= RCC_AHBENR_DMA1EN;  // DMA1 clock enable
	
	ADC1->CR |= ADC_CR_ADEN;  // ADC enable
	ADC1->CFGR2 |= (1<<30);  // 01: PCLK/2 (Synchronous clock mode)
	ADC1->CFGR1 |= (ADC_CFGR1_CONT | ADC_CFGR1_DMAEN | ADC_CFGR1_CHSELRMOD | ADC_CFGR1_DMACFG);  // 1: Continuous conversion mode &  Direct memory access enable & Direct memory access configuration
	
	ADC1->SMPR |= ADC_SMPR_SMP1_1;  // Sampling time selection 1 (010: 7.5 ADC clock cycles)
	ADC1->CHSELR |= (ADC_CHSELR_CHSEL0 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL2);  // Channel-x selection (Channel-x selection)
	
	ADC1->CR |= ADC_CR_ADEN;  // ADC enable
	
	DMA1_Channel1->CPAR = (uint32_t)&(ADC1->DR);  // peripheral Address
	DMA1_Channel1->CMAR = (uint32_t)Aout;  // Memory Address
	DMA1_Channel1->CNDTR = 3;  // No Of Data
	DMA1_Channel1->CCR |= (DMA_CCR_MINC | DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0| DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_TCIE);  // Msize,Psize,CIRC,MINC
	DMA1_Channel1->CCR |= DMA_CCR_EN;  // DMA enable
	
	NVIC_EnableIRQ(DMA1_Channel1_IRQn);
	NVIC_SetPriority(DMA1_Channel1_IRQn,0);
	
	ADC1->CR |= ADC_CR_ADEN;  // ADC enable
}

[Kamil Duljas]

First try run my example because it's hardware agnostic. Independent against external devices. When my examples will be valid, then try run on other channels

[Sudhakar.R]

I use the same code output is came in ADC->DR only.but output is not came in Aout variable.

[Kamil Duljas]

Show me all code related to this variable Aout

[waclawek.jan]

How is DMAMUX set?

JW

[Sudhakar.R]

I use stm32cubeide for STM32G030K6T6 Microcontroller, HAL_ADC_Start_DMA(&hadc1, Aout, 3) is not working outside(user code begin 2) the while loop. In bulepill board, this comment is working outside(user code begin 2) & inside the while loop. In STM32G030K6T6 Microcontroller, why this comment is not working outside(user code begin 2) the while loop?

[Sudhakar.R]

hi @Kamil Duljas​,

below i given my code,

#include<stm32g030xx.h>
 
volatile uint32_t Aout[3];
 
int main()
{
	RCC->IOPENR |= (RCC_IOPENR_GPIOAEN);  // I/O port A clock enable
	
	GPIOA->MODER &= ~(GPIO_MODER_MODE0 | GPIO_MODER_MODE1 | GPIO_MODER_MODE2);  // clear 0, 1, 2 pin
	GPIOA->MODER |= (GPIO_MODER_MODE0_0 | GPIO_MODER_MODE0_1 | GPIO_MODER_MODE1_0 | GPIO_MODER_MODE1_1 | GPIO_MODER_MODE2_0 | GPIO_MODER_MODE2_1);  // 11: Analog mode
	
	RCC->APBENR2 |= RCC_APBENR2_ADCEN;  // ADC clock enable
	RCC->AHBENR |= RCC_AHBENR_DMA1EN;  // DMA1 clock enable
	
	DMA1_Channel1->CPAR = (uint32_t)&(ADC1->DR);  // peripheral Address
	DMA1_Channel1->CMAR =(uint32_t)&Aout;  // Memory Address
	DMA1_Channel1->CNDTR = 3;  // No Of Data
	DMA1_Channel1->CCR |= (DMA_CCR_MINC | DMA_CCR_MSIZE_1 | DMA_CCR_PSIZE_1| DMA_CCR_CIRC | DMA_CCR_TEIE);  // Msize,Psize,CIRC,MINC
	DMA1_Channel1->CCR |= DMA_CCR_EN;  // DMA enable
 
	ADC1->CFGR2 |= (1<<30);  // 01: PCLK/2 (Synchronous clock mode)
	ADC1->CFGR1 |= (ADC_CFGR1_CONT | ADC_CFGR1_DMAEN | ADC_CFGR1_CHSELRMOD | ADC_CFGR1_DMACFG);  // 1: Continuous conversion mode &  Direct memory access enable & Direct memory access configuration
	ADC1->SMPR |= ADC_SMPR_SMP1_1;  // Sampling time selection 1 (010: 7.5 ADC clock cycles)
	ADC1->CHSELR |= (ADC_CHSELR_CHSEL1);  // Channel-x selection (Channel-x selection)
	ADC1->ISR &= ~(ADC_ISR_EOC | ADC_ISR_EOS | ADC_ISR_OVR);
 
	NVIC_EnableIRQ(DMA1_Channel1_IRQn);
	NVIC_SetPriority(DMA1_Channel1_IRQn,0);
 
	ADC1->CR |= ADC_CR_ADEN;  // ADC enable
	ADC1->CR |=ADC_CR_ADSTART;
	
	while(1)
	{
		
	}
}
 
void DMA1_Channel1_IRQHandler(void)
{
	while(!(DMA1->ISR & DMA_ISR_TCIF1)); // Check Transfer Complete Flag
	DMA1->IFCR |= DMA_IFCR_CTCIF1;  // Clear Transfer Complete Flag
}

[Sudhakar.R]

hi @Community member​ 

How to configure DMAMUX for ADC ?

[waclawek.jan]

I don't use the 'G0, but generally, you look at the input requests mapping table:

 

and write the number of request (here: 5) into the chosen DMAMUX channel's DMAMUX_CxCR.DMAREQ_ID register.

Note, that DMAMUX channels are onfusingly numbered starting with 0, whereas DMA channels are numbered starting with 1, so for DMA1 Channel1 you should use DMAMUX channel 0.

JW