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STM32F7 QSPI Fast Read Quad Problems

PUrsu.1
Associate II

I am here again to ask for your help :)

I am using a STM32F767ZI Nucleo Board and connected a Winbond W25Q64JV using the QSPI interface of the MCU. Everything is working fine so far - I can read data in every mode described in the data sheet (even Fast Read Dual I/O), and write data even in the Quad Input Page Program mode.

The only thing not working at the moment is reading data in Fast Read Quad Out or Fast Read Quad Input mode. The data returned by the Winbond memory chip is not correct.

The only thing I do is checking in the registers that the QE bit is set correctly - which it is.

QSPI Init method:

static void MX_QUADSPI_Init(void) {
    /* QUADSPI parameter configuration*/
    hqspi.Instance = QUADSPI;
    // CPU freq: 216
    hqspi.Init.ClockPrescaler = 4;
    hqspi.Init.FifoThreshold = 4;
    hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
    hqspi.Init.FlashSize = 23;
    hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_4_CYCLE;
    hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
    hqspi.Init.FlashID = QSPI_FLASH_ID_1;
    hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
    if (HAL_QSPI_Init(&hqspi) != HAL_OK) {
        Error_Handler();
    }
}

Method for reading:

W25QState W25QFlash::readFromAddr(uint8_t *buffer, uint16_t len, uint32_t addr) {
    while (this->isBusy() == W25QState::BUSY) {
        osDelay(1);
    }
 
    QSPI_CommandTypeDef com;
 
    com.InstructionMode = QSPI_INSTRUCTION_1_LINE; // QSPI_INSTRUCTION_...
    com.Instruction = W25Q_FAST_READ_QUAD_IO;     // Command
    com.AddressSize = QSPI_ADDRESS_24_BITS;
 
    com.AddressMode = QSPI_ADDRESS_4_LINES;
 
    com.Address = addr;
 
    com.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
    com.AlternateBytes = QSPI_ALTERNATE_BYTES_NONE;
    com.AlternateBytesSize = QSPI_ALTERNATE_BYTES_NONE;
 
    com.DummyCycles = 8;
    com.DataMode = QSPI_DATA_4_LINES;
    com.NbData = len;
 
    com.DdrMode = QSPI_DDR_MODE_DISABLE;
    com.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
    com.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
 
    int f = HAL_QSPI_Command(this->handle, &com, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
    if (f != HAL_OK) {
        return W25QState::ERR;
    }
    f = HAL_QSPI_Receive(this->handle, buffer, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
 
    if (f != HAL_OK) {
        return W25QState::ERR;
    }
 
    return W25QState::OK;
}

I tried changing a lot of settings in the source code (CS high time, dummy cycles, etc.) and in the registers of the flash chip (driver output strength) - but it is still not working.

Does anyone have an idea, what I can try to come closer to a solution?

PS: I double checked that the connection between the MCU and the W25 is correct.


_legacyfs_online_stmicro_images_0693W00000bjUJuQAM.png 

12 REPLIES 12

Doesn't 0xEB command expect an 0xF* value in the Alternate byte

Or use try using 0x6B with the ADDRESS in 1-bit, and 8 dummy cycles


_legacyfs_online_stmicro_images_0693W00000bjUPJQA2.png

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Up vote any posts that you find helpful, it shows what's working..

Thank you for your fast response. I forgot to mention that I also tried Fast Read Quad Out (0x6B) with one address line - same result, receiving incorrect data.

I will try now once again tuning the alternate bytes - I did that before, but without a positive result.

I tried changing the byte after the address bytes to the following:

com.AlternateByteMode = QSPI_ALTERNATE_BYTES_4_LINES;

com.AlternateBytes = 0xF1;

com.AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS;

The same result like before.

According to the LogicAnalyzer everything looks fine.

Is it normal, that the DQ3 line is high in Idle state?

The analyzer plot is hard to see, looks to be too many dummy cycles.

You really need a good data pattern in the flash, and perhaps show it's response in other modes. Or an MCU side dump of the patterns recovered.

I don't recall the dummy cycles being programmable on the Winbond parts.

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>>Is it normal, that the DQ3 line is high in Idle state?

Going to depend on pull-up.

If the QE isn't configured properly (it's in SR2) I could see that being an issue.

Older Winbond's need SR1/SR2 updated as a pair, 0x31 isn't a valid command.

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Up vote any posts that you find helpful, it shows what's working..

If I am reading out the three status registers, I can see that QE is high/enabled - so I am assuming that the Winbond is configured correctly.


_legacyfs_online_stmicro_images_0693W00000bjUtxQAE.png

Here is a better picture from the Logic Analyzer output for the Fast Read Quad IO.

PUrsu.1
Associate II

I ordered some W25Q128JVIQ Chips - tested them - same result. The chips came preconfigured with the QE bit enabled, so the problem should not be the misconfiguration of the Winbond.