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TFuji.5
TFuji.5
Associate
July 14, 2021
Question

STM32F427 SPI Enable control

  • July 14, 2021
  • 4 replies
  • 1080 views

Hello

We select the STM32F427 for new product and use the SPI slave function.​

We want to control the SPI enable/disable for the data input control.(SPI_CR1 bit6 SPE)

Can the STM32 SPI function receive the data immediately after SPI enabling?​

Are there certain time constraints in this matter?

This topic has been closed for replies.

4 replies

TDK
TDK
July 15, 2021

The clock needs to be on its idle state and probably one clock tick needs to occur such that the level registers. But no extended wait or anything.

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Imen.D
ST Technical Moderator
July 15, 2021

Hello @TFuji.5​ and welcome to the Community,

I adivse you this AN5543 "Enhanced methods to handle SPI communication on STM32 devices". This document provides tips on how to prevent, and how to manage, the most frequent difficulties encountered when handling SPI communications.

Hope this helps you !

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Imen

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TFuji.5
TFuji.5Author
Associate
July 20, 2021

Dear TDK-san

​

Thank you for your reply.

I think the so, too. The spi controller can receive the data after one clock(spi controller internal clock) after SPE enable.

​

Dear lmen-san

​

​Thank you for your reply.

Sorry. I checked the AN5543 document and couldn't find the timing spec(From SPE enable to the ready for receiving).

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MasterT
MasterT
Lead II
July 20, 2021

Datasheet: https://www.st.com/en/microcontrollers-microprocessors/stm32f427-437.html#documentation

page 144 Table 62. SPI dynamic characteristics defines:

t su(NSS) NSS setup time Slave mode, SPI presc = 2 4T PCLK

I'm not sure, if logic re-triggering would require more time with lower baudrate, like

( t baud_rate /2 ) + 4 × t pclk.

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