2021-03-11 01:51 AM
I've configured the SPI to work with DMA. The microcontroller is sending but is not reading. I have checked the configuration and I cannot see the problem. Can you see something strange in my code.
I've tested this code in an STM32F429-DISCO board and works.
This is the peripheral definition.
#define SPI_BCC SPI1
#define SPI_BCC_CLK RCC_APB2Periph_SPI1
#define SPI_BCC_CLK_EN RCC_APB2PeriphClockCmd(SPI_BCC_CLK, ENABLE)
#define SPI_BCC_SCK_PIN GPIO_Pin_3
#define SPI_BCC_SCK_GPIO_PORT GPIOB
#define SPI_BCC_SCK_GPIO_CLK RCC_AHB1Periph_GPIOB
#define SPI_BCC_SCK_SOURCE GPIO_PinSource3
#define SPI_BCC_SCK_AF GPIO_AF_SPI1
#define SPI_BCC_MISO_PIN GPIO_Pin_4
#define SPI_BCC_MISO_GPIO_PORT GPIOB
#define SPI_BCC_MISO_GPIO_CLK RCC_AHB1Periph_GPIOB
#define SPI_BCC_MISO_SOURCE GPIO_PinSource4
#define SPI_BCC_MISO_AF GPIO_AF_SPI1
#define SPI_BCC_MOSI_PIN GPIO_Pin_5
#define SPI_BCC_MOSI_GPIO_PORT GPIOB
#define SPI_BCC_MOSI_GPIO_CLK RCC_AHB1Periph_GPIOB
#define SPI_BCC_MOSI_SOURCE GPIO_PinSource5
#define SPI_BCC_MOSI_AF GPIO_AF_SPI1
#define SPI_BCC_CS1_PIN GPIO_Pin_11
#define SPI_BCC_CS1_GPIO_PORT GPIOB
#define SPI_BCC_CS1_GPIO_CLK RCC_AHB1Periph_GPIOB
#define SPI_BCC_CS2_PIN GPIO_Pin_12
#define SPI_BCC_CS2_GPIO_PORT GPIOC
#define SPI_BCC_CS2_GPIO_CLK RCC_AHB1Periph_GPIOC
#define SPI_BCC_CS3_PIN GPIO_Pin_11
#define SPI_BCC_CS3_GPIO_PORT GPIOC
#define SPI_BCC_CS3_GPIO_CLK RCC_AHB1Periph_GPIOC
#define SPI_BCC_CS4_PIN GPIO_Pin_10
#define SPI_BCC_CS4_GPIO_PORT GPIOC
#define SPI_BCC_CS4_GPIO_CLK RCC_AHB1Periph_GPIOC
#define SPI_BCC_CS5_PIN GPIO_Pin_15
#define SPI_BCC_CS5_GPIO_PORT GPIOA
#define SPI_BCC_CS5_GPIO_CLK RCC_AHB1Periph_GPIOA
#define SPI_BCC_CS6_PIN GPIO_Pin_15
#define SPI_BCC_CS6_GPIO_PORT GPIOA
#define SPI_BCC_CS6_GPIO_CLK RCC_AHB1Periph_GPIOA
#define DMA_BUFFER_SIZE 6
#define SPI1_DMA DMA2
#define SPI1_DMA_CLK RCC_AHB1Periph_DMA2
#define SPI1_TX_DMA_CHANNEL DMA_Channel_3
#define SPI1_TX_DMA_STREAM DMA2_Stream3
#define SPI1_TX_DMA_FLAG_TCIF DMA_FLAG_TCIF3
#define SPI1_RX_DMA_CHANNEL DMA_Channel_3
#define SPI1_RX_DMA_STREAM DMA2_Stream2
#define SPI1_RX_DMA_FLAG_TCIF DMA_FLAG_TCIF3
This is the configuration:
static void SPI_BCC_Config(void)
{
/* Structure definition */
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
/* Peripheral Clock Enable -------------------------------------------------*/
/* Enable the SPI clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
/* Enable GPIO clocks */
RCC_AHB1PeriphClockCmd(SPI_BCC_SCK_GPIO_CLK | SPI_BCC_MISO_GPIO_CLK | SPI_BCC_MOSI_GPIO_CLK, ENABLE);
/* Enable DMA clock */
RCC_AHB1PeriphClockCmd(SPI1_DMA_CLK, ENABLE);
/* SPI GPIO Configuration --------------------------------------------------*/
/* GPIO Deinitialisation */
GPIO_DeInit(SPI_BCC_SCK_GPIO_PORT);
GPIO_DeInit(SPI_BCC_MISO_GPIO_PORT);
GPIO_DeInit(SPI_BCC_MOSI_GPIO_PORT);
/* Connect SPI pins to AF1 */
GPIO_PinAFConfig(SPI_BCC_SCK_GPIO_PORT, SPI_BCC_SCK_SOURCE, SPI_BCC_SCK_AF);
GPIO_PinAFConfig(SPI_BCC_MISO_GPIO_PORT, SPI_BCC_MISO_SOURCE, SPI_BCC_MISO_AF);
GPIO_PinAFConfig(SPI_BCC_MOSI_GPIO_PORT, SPI_BCC_MOSI_SOURCE, SPI_BCC_MOSI_AF);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
/* SPI SCK pin configuration */
GPIO_InitStructure.GPIO_Pin = SPI_BCC_SCK_PIN;
GPIO_Init(SPI_BCC_SCK_GPIO_PORT, &GPIO_InitStructure);
/* SPI MOSI pin configuration */
GPIO_InitStructure.GPIO_Pin = SPI_BCC_MOSI_PIN;
GPIO_Init(SPI_BCC_MOSI_GPIO_PORT, &GPIO_InitStructure);
/* SPI MISO pin configuration */
//GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
//GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_InitStructure.GPIO_Pin = SPI_BCC_MISO_PIN;
GPIO_Init(SPI_BCC_MISO_GPIO_PORT, &GPIO_InitStructure);
/* SPI configuration -------------------------------------------------------*/
SPI_I2S_DeInit(SPI_BCC);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_128;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_CRCPolynomial = 7;
/* Initializes the SPI configuration */
SPI_Init(SPI_BCC, &SPI_InitStructure);
/* DMA configuration -------------------------------------------------------*/
/* Deinitialize DMA Streams */
DMA_DeInit(SPI1_TX_DMA_STREAM);
DMA_DeInit(SPI1_RX_DMA_STREAM);
/* Configure DMA Initialization Structure */
DMA_InitStructure.DMA_BufferSize = DMA_BUFFER_SIZE ;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_PeripheralBaseAddr =(uint32_t) (&(SPI1->DR)) ;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
/* Configure TX DMA */
DMA_InitStructure.DMA_Channel = SPI1_TX_DMA_CHANNEL ;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral ;
DMA_InitStructure.DMA_Memory0BaseAddr =(uint32_t)DMA_SPIBufferTx ;
DMA_Init(SPI1_TX_DMA_STREAM, &DMA_InitStructure);
/* Configure RX DMA */
DMA_InitStructure.DMA_Channel = SPI1_RX_DMA_CHANNEL ;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory ;
DMA_InitStructure.DMA_Memory0BaseAddr =(uint32_t)DMA_SPIBufferRx ;
DMA_Init(SPI1_RX_DMA_STREAM, &DMA_InitStructure);
/* Enable the SPI peripheral */
SPI_Cmd(SPI_BCC, ENABLE);
}
And this is what handles the transfer and reception:
bcc_status_t BCC_MCU_TransferSpi(uint8_t dev, uint8_t transBuf[], uint8_t recvBuf[])
{
/*Copy Frame to buffer*/
for (SPI_Buf_idx = 0; SPI_Buf_idx < DMA_BUFFER_SIZE; SPI_Buf_idx++)
{
DMA_SPIBufferTx[SPI_Buf_idx] = transBuf[SPI_Buf_idx];
}
/*Set Chip select to LOW level*/
BCC_MCU_WriteCsbPin(dev, 0);
/*Enable DMA transfer*/
DMA_Cmd(SPI1_TX_DMA_STREAM, ENABLE);
DMA_Cmd(SPI1_RX_DMA_STREAM, ENABLE);
/* Enable SPI DMA TX Request */
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);
/* Enable SPI DMA RX Request */
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, ENABLE);
/* Waiting the end of Data transfer */
while (SPI1_TX_DMA_STREAM->NDTR==RESET)DONOTHING()
while(SPI_GetFlagStatus(SPI_BCC,SPI_FLAG_BSY)== SET)DONOTHING()
/* Clear DMA Transfer Complete Flags */
DMA_ClearFlag(SPI1_TX_DMA_STREAM,SPI1_TX_DMA_FLAG_TCIF);
DMA_ClearFlag(SPI1_RX_DMA_STREAM,SPI1_RX_DMA_FLAG_TCIF);
/* Disable DMA SPI TX Stream */
DMA_Cmd(SPI1_TX_DMA_STREAM,DISABLE);
/* Disable DMA SPI RX Stream */
DMA_Cmd(SPI1_RX_DMA_STREAM,DISABLE);
/* Disable SPI DMA TX Requsts */
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, DISABLE);
/* Disable SPI DMA RX Requsts */
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, DISABLE);
/*Set Chip select to HIGH level*/
BCC_MCU_WriteCsbPin(dev, 1);
//Flush_RxBuffer();
/* Store received data to recvBuf. */
for (SPI_Buf_idx = 0; SPI_Buf_idx < DMA_BUFFER_SIZE; SPI_Buf_idx++)
{
recvBuf[SPI_Buf_idx]= DMA_SPIBufferRx[SPI_Buf_idx];
//printf("0x%x ",DMA_SPIBufferRx[SPI_Buf_idx]);
}
//printf("\n\r");
return BCC_STATUS_SUCCESS;
}
I cannot see were the problem is. I have suspicions on the flags but I cannot see what is wrong.
Thank you in advance.
Solved! Go to Solution.
2021-03-11 03:44 AM
Problem solved by itself.
After commenting and uncommenting a few lines, the reception started working so my guess is that it was a problem from the IDE.
The code posted above works in case someone needs an example.
Thanks.
2021-03-11 02:07 AM
I don't attempt to understand your code, but
> #define SPI1_TX_DMA_FLAG_TCIF DMA_FLAG_TCIF3
> #define SPI1_RX_DMA_FLAG_TCIF DMA_FLAG_TCIF3
is suspicious.
JW
2021-03-11 02:16 AM
Thank you, Jan.
Sorry for that. I was just testing a different flags this is like it should be:
> #define SPI1_TX_DMA_FLAG_TCIF DMA_FLAG_TCIF3
> #define SPI1_RX_DMA_FLAG_TCIF DMA_FLAG_TCIF2
2021-03-11 03:44 AM
Problem solved by itself.
After commenting and uncommenting a few lines, the reception started working so my guess is that it was a problem from the IDE.
The code posted above works in case someone needs an example.
Thanks.