Hello everyone,
i am working on the STM32H743 eval
board. Setup is fine and the external SRAM3 can be read/written correctly by
some memory mapped IO access. I want now to implement some timer triggered
(event or IT) read and write FMC or memory mapped IO DMA circular memory
access, but up to now i am confused and failed due to all the STM32H7
DMA/BDMA/Cache problems. I was searching and reading a lot, suitable examples
are hard to find at all.
What i have done up to now;
-Eval board setup is working fine
-FMC external SRAM3 memory mapped
write/read is working
-LPTIM2 and TIM2 are working
My "knowledge" about the
problems:
-FMC is connected by AHB4
-timer triggered DMA might not be
possible
-so BDMA and DMAMUX must be used
-BDMA examples are nearly not existent
-because of D3 domain i have to use
internal SRAM4
My main questions are:
-Must the external SRAM3 connected to
FMC be assumed as peripheral to memory or memory to memory direction (i think
both should work)?
-Can the timer triggered access be done
by DMA or just by BDMA (i think both should work)?
-Which Cache solution should i prefer
(disable D-Cache, MPU Setup, InvalidateCache)?
-Did anybody something similar, got it
working and might give me any recommendations or hints please?
Any help might be great and appreciated
up to now i just worked on smaller STM32 parts. Thank you very much in advance
and sorry for my bad english.
