STM32F4, wish list for 2012.

[Asantos]

Posted on January 06, 2012 at 19:30

1 - STM32F405RE / RC

2 - Analog comparator with DAC reference. 3 - Embedded ethernet phyter. 4 - PGA. #least-likely-prediction-for-2013

[infoinfo989]

Posted on January 06, 2012 at 21:11

I'll add to your list:

5. All RAM accessible via DMA 6. ''data count'' register on DCMI 7. Working hardware flow control on SDIO 8. I/O voltage control for SDIO Frank.

http://www.frankvh.com/stm32-information.html

[amin23]

Posted on January 10, 2012 at 08:30

I'll add to your list:

9.    DMA NDTR should be 32bit

[disirio2]

Posted on January 10, 2012 at 10:41

10. Atomic GPIO pin toggling by writing the BSRR register both set and reset bits to 1.

[flyer31]

Posted on January 10, 2012 at 21:10

I think they won't do this (create toggle bit command), as this would get quite complicated for the processor to manage. This would be a Read-Modify-Make command, and together with these many bus structures, this gets very complicated - nearly impossible to implement this in a save atomic way.

Do you have an example, where you would really need such a toggle command very much, or is it just something ''nice to have'' for you?

[rmteo]

Posted on January 11, 2012 at 05:49

Some NXP parts have this feature which I find quite useful.

While we are at it, SDRAM support will be nice.

[disirio2]

Posted on January 11, 2012 at 11:53

It wouldn't be the processor to manage it but the GPIO peripheral...

The only change is to give the S/R bits of the BSRR register the same truth table of a JK flip-flop, you don't need more registers or ''commands'', it fits in the current GPIO architecture. Use case? everywhere you need to change the state of a pin *without* having to do a read/modify/write or having to make it into a critical zone because you need atomicity. Nothing transcendental, already seen on other platforms and the only feature missing in the GPIO. Giovanni

[oli2]

Posted on January 11, 2012 at 15:00

11. Decent documentation for the peripheral libraries.

[xzhang2]

Posted on January 11, 2012 at 15:55

12. SDIO clock support upto 50MHz for SD card

13. McBSP interface

[Tesla DeLorean]

Posted on January 11, 2012 at 18:17

I'm not sure what's being wished for here as the F4 design is unlikely to change.

My STM32 gripes are 16-bit timers, all should be 32-bit, chained timers can't be accessed atomically. See also 32-bit counters, DMA, etc. Timer Wizard, need something to generate timer code or examples, for all possible use cases. DMA Wizard, something to illustrate possible connections, timers, peripherals, limitations, etc. Sure I can read the documentation, but some kind of ''fitter'' tools would be useful to allocate peripherals, pins and resources. SPI 8 or 16-bit, this is incredibly inflexible, need programmable bit length, more flexible rate generation. Stupid integer divider/prescalers, get some NCO/DDS using adders not incrementers. At low frequencies the jitter isn't an issue, and gives incredible range of possible frequency settings.