STM32F303CBT6 DAC not working with DMA

[freya17365]

Dear all,

I'm trying to generate a waveform using DAC OUT1.

I configured pin PA4 as analog (works)

I configured DAC1 without DMA and it works

I configured TIM6 and it works

Then I configured DAC with DMA, configured DMA, but output never changes.

Where can I check?

I enclose the minimun configuration code:

/* DAC Configuration */
if(!(RCC->APB1ENR & RCC_APB1ENR_DAC1EN)) RCC->APB1ENR |= RCC_APB1ENR_DAC1EN; // Enable DAC clock
DAC1->CR |= DAC_CR_DMAEN1 | DAC_CR_MAMP1_3 | DAC_CR_EN1; // DMA1 enable | Amplitude 511 |Wave generation disabled | Timer6 TRGO event | Trigger enable | Buffer enable | DAC1_OUT1 enable


/* DAC Timer */
if(!(RCC->APB1ENR & RCC_APB1ENR_TIM6EN)) RCC->APB1ENR |= RCC_APB1ENR_TIM6EN; // Enable TIM6 clock
TIM6->CR2 |= TIM_CR2_MMS_2; // The update event is selected as a trigger output (TRGO).
TIM6->DIER |= TIM_DIER_UIE | TIM_DIER_UDE; //Enable interrupt | Enable DMA request
TIM6->EGR = TIM_EGR_UG; // Re-initializes the timer counter and generates an update of the registers
TIM6->CR1 |= TIM_CR1_CEN; // Enable TIM6


/* DAC DMA */
if(!(RCC->AHBENR & RCC_AHBENR_DMA1EN)) RCC->AHBENR |= RCC_AHBENR_DMA1EN; // Enable DMA1 clock
SYSCFG->CFGR1 |= SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP;
DMA1_Channel3->CCR |= DMA_CCR_PL_0 | DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_DIR | DMA_CCR_TCIE; // Medium priority | size 16 bit both mem and periph | mem increment | circular | mem to periph | Transfer complete interrupt
DMA1_Channel3->CNDTR = 100; // Data to be transfered
DMA1_Channel3->CPAR = (uint32_t) &(DAC1->DHR12R1); // Peripheral address
DMA1_Channel3->CMAR = (uint32_t) &sen[0]; // Memory address
DMA1_Channel3->CCR |= DMA_CCR_EN; // Enable DMA

Both TIM6_DAC_IRQn and DMA1_Channel3_IRQn are enabled.

I tried to find also some examples or AN documents, but I faild.

Any hint would be appreciated.

Thank you

Freya

[mƎALLEm]

Hello,

In next time please use </> to share a code. Please read How to write your question to maximize your chances to find a solution

I invite you to edit your post to comply with the rule.

Thank you for your understanding.

[waclawek.jan]

Read out and check/post content of relevant DMA, DAC, TIM and GPIO registers.

If you want to use timer (or any external event, including software trigger) to trigger DAC, you need to set DACx_CR.TENx, too.

JW

[freya17365]

Hi,

I did it, but nothing changed

DAC1->CR |= DAC_CR_DMAEN1 | DAC_CR_MAMP1_3 | DAC_CR_TEN1 | DAC_CR_EN1;

I think DMA configuration is correct, maybe I fail in setting interrupt to activate it?

It should be TIM6 update event that activate DMA. Is it correct?

Thank you

Freya

[Michal Dudka]

Usually, it is not done this way. You are now trying to generate DMA requests from the timer. But normally, DMA requests are generated by the DAC, whose conversion is triggered by the timer.

The SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP bit controls whether the third DMA channel will receive requests from the timer or the DAC. The DMA now expects requests to come from the DAC, whereas in your case they are sent by the timer and therefore do not arrive.

Either reset this bit and let the DMA requests come from the timer. Or do it the way it's normally done. Set up a timer-triggered conversion in the DAC (as advised by waclawek.jan) and enable DMA requests in the DAC, leaving the SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP bit set (so that requests come to the DMA from the DAC and not from the timer). This solution will give you slightly more precise control over the timing of the DA conversion (eliminating any jitter in DMA requests).