I am designing a 4 layer PCB which uses an STM32L433 and working on the layout for the LSE and HSE crystals.
I referred to the application note AN2867 for guidance, but I am confused by the isolated ground plane underneath the crystals as shown in Figure 14...
1. How is the isolated ground plane supposed to be connected to the ground net ?
2. Do all inner layers need an isolated ground plane ?
At the moment, the isolated ground plane is only on inner layer 1 and its ground connection is made by the vias on the guard rail to inner layer 2.
Below are screenshots of the current implementation.
The screenshot below shows the top layer (signals in red) and inner 1 layer (ground in green)....
The screenshot below shows the top layer (signals in red) and inner 2 layer (ground in orange)....
The screenshot below shows the top layer (signals in red) and bottom layer (signals in blue)....
