STM32F2xx & Keil RTX

[kasper]

Posted on December 21, 2010 at 07:30

STM32F2xx & Keil RTX

[kasper]

Posted on May 17, 2011 at 14:19

Hello,

I am very happy for your help!!

I have the Ulink2, but sadly i have forgotten to connect the SWO line and used it for CLK to my I2S. 

But i can solder a wire on this pin and use is for some use.

I will come back later with the result, so i hop you could help to analyse.

I will not be home the next couple of days, so it can take a litle time.

Kasper

[kasper]

Posted on May 17, 2011 at 14:19

Hello, i tried to turn down the clock speed even more to 30Mhz, now it seems like it will not crash any more.

Can it be something for the new STM32F2xx has zero wait states on flash?

Kasper

[kasper]

Posted on May 17, 2011 at 14:19

Hello,

From the exeption list the last IRQ before hardfault is my external IRQ, coming from a IR reciever, my code looks:

void RC5_EXTI_IRQHandler(void)

{

  /* If an edge is detected on RC5 input pin */

  if(EXTI_GetITStatus(RC5_EXTI_LINE) != RESET) 

  {

    /* Signal to sirc an IRQ has arrived */

isr_evt_set (0x0001, sirc_task_id);

    /* Clear the RC5 EXTI line pending bit */

    EXTI_ClearITPendingBit(RC5_EXTI_LINE);

  }

}

It is not always it generates error in this irq rutine.

Kasper

[damh]

Posted on May 17, 2011 at 14:19

In your example PC has an even address.

Only odd addresses are allowed in cortex m3 (thumb-2 code). Even addresses of PC fire a hardfault. (perhaps only your log output writes wrong register values) (Flash waitstates must be configured, before you switch to the new frequency. If I don't do so, it crashes always completely (no hardfault at all))

[joseph239955_st]

Posted on May 17, 2011 at 14:19

It might not be the even address issue. (Unless you using the value for BX, BLX, POP, etc).

Stacked PC in an exception stack frame does not need to have LSB set to one. The execution state (ARM/Thumb) will be determined by the T bit in the stacked xPSR during exception return. If it doesn't crash when you lower the frequency, it might be a timing issue in system setup, or timing of tasks interaction.

[kasper]

Posted on May 17, 2011 at 14:19

Hello,

As far as i know the RTX has only been made for the STM32F1xx series, this is the 2xx series, it can run quite faster and is running without wait cycles when executing from flash, i am not sure it his can be a problem??.

But when running at 60Mhz it seems to have problem still, but maybe i could see if i can add some wait cycles...

Than you very much for your feedback

Kasper

[kasper]

Posted on May 17, 2011 at 14:19

Hi,

Allready have 3 wait cycles:

  /*  Enable Flash prefetch, Instruction cache and Data cache for max performance

  and set Flash 3 wait state */

FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | 0x03;

Kasper

[kasper]

Posted on May 17, 2011 at 14:19

Hello,

I think i have solved the issue, i stillhave a lot to do, and get some hard faults still once i a while, but i think ican manage.

I think the biggest problem was i did usethe pre-compiled lib included in keil instead adding the source code andcompile them, that seemed to help and the running at 60Mhz instead 120Mhz.

I need the speed, for sw. mp3 decoding,but i can stay with the 60mhz till keil releases full support for the 2xxseries, and the i can see if i still get errors.

I am now able to play a complete wave fileof several minutes without errors :)

Thank you very much for your help, i have defiantlybeen learning some about hard faults :)

Kasper