2024-03-07 06:32 AM
RM 0456 10.5.4 Dynamic voltage scaling management writes under "System frequency steps on STM32U59x/5Ax/5Fx/5Gx device"
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On STM32U59x/5Ax/5Fx/5Gx devices only, the maximum system frequency increase or
decrease in the VOS range 1 is 80 MHz.
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This is unclear to me. On first reading I thought that 80 .. 160 Mhz in range 1 is not possible! Or does this imply a special handling needed when in Range 1 and target frequency is 1..80 MHz while with target frequency 80 .. 160 Mhz the handling explained before is needed?
2024-03-08 06:28 AM - edited 2024-03-08 06:33 AM
Hello @Uwe Bonnes ,
The maximum frequencies is shown below (in table 114 of RM0456).
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On STM32U59x/5Ax/5Fx/5Gx devices only, the maximum system frequency increase or
decrease in the VOS range 1 is 80 MHz.
===
This sentence implies the special handling needed when we are in VOS range1. The 80 Mhz is a key frequency to consider in the sequences of frequency increase or decrease in case of VOS range1:
1. Divide the system clock by two, using the AHB prescaler (HPRE = 0b1000
in RCC_CFGR2).
2. Configure and enable the PLL1 if needed.
3. Select PLL1 as system clock source (SW = 0b11 in RCC_CFGR1).
4. Wait for 5 μs.
5. Set the AHB prescaler to 1 (HPRE = 0b0000 in RCC_CFGR2).
1. Divide the system clock by two using the AHB prescaler (HPRE = 0b1000
in RCC_CFGR2).
2. Wait for 5 μs.
3. Define the lower speed clock as system clock source.
4. Set the AHB prescaler back to 1 (HPRE = 0b0000 in RCC_CFGR2).
Table 114 of RM0456 summarizes the Busses maximum frequencies:
Best Regards,
Younes
2024-03-08 06:31 AM
Hi @Uwe Bonnes,
I will check internally your request for more clarifications in the RM !!
Best Regards