Regarding SPI DMA Rx issue when using SPI 8 bit mode

[AAnn?]

Hello,

I have had an issue with SPI Rx DMA. In short, I recieve twice as many bytes as I expect when using SPI 8 bit mode (STM32CubeIDE setting), but not in 16 bit mode.

A brief description of the project:

Im using an external accelerometer with 220ksps. The senor buffers 100 samples which are available when a busy pin goes high.

I have configured TIM8 EXTI to trigger on the busy pin from the accelerometer. TIM8 is set to one pulse mode and generates 100 capture compare interrupts.

On each capture compare event, DMA2_Channel6 transfers a half word (dummy bytes) to the SPI RXFIFO start the SPI shift register.

On RXNE interrupt (quarter or half full RX FIFO, I have tried both), DMA1_Channel4 transfers 16 bytes to a large circular buffer.

Both DMA on Rx and Tx are set to half word transfers.

This setup works fine when the SPI is set to 16 bit mode. However, I do not want to use 16 bit mode as I need FIFO unpacking to get the correct endianess of the samples. When setting the SPI to 8 bit I believe I recieve twice as many bytes in my circular buffer. The reason I believe this is that the error code (0x0000) is symmetric with 200 samples instead of 100 samples.

(The only change I made to the working code is to set SPI to 8 bit mode)

My question is if anyone know what might be the cause of this issue or how you would go about troubleshooting?

Also, I am using the STM32L476RG nucleo board.

Thanks a lot.

Best regards,

Albin

[S.Ma]

The SPI IP version on STM32L476 probably is V2 with programmable bit control and 32bit FIFO

These FIFO were probably intended for performance at application backward compatibility cost.

Before, when you physically write 16 bit to SPI DR, only LSB byte went through.

Now, both MSB and LSB are queued. This is probably the issue.

It's been IP Adjusted in the HAL so it means you are not using it and bumped into this issue believing in seamless migration from older part?