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RCC_DBP flag set timeout

sde c.1
Senior II

Hi,

I have a low power controller which i will use as RTC.

type: STM32L031F6P7.

I use a custom board

0693W00000GZDpfQAH.pngThese are the clock settings

0693W00000GZ5FFQA1.png 

I also notice there is no oscillating signal at PC15 . When should the LSE oscillator start? after powerup or after SystemClock_Config()?

The crystal is recommended by STM, and the PCB seems ok.

0693W00000GZDpkQAH.pngI see the Backup Domain Write Protection disabling goes in timeout.

RCC_APB1ENR.PWRE bit is set at that moment.

Can't figure out what is going wrong.

in SystemClock_Config -> HAL_RCC_OscConfig ->
 
/* Wait for Backup domain Write protection disable */
      tickstart = HAL_GetTick();
 
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
      {
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
        {
          return HAL_TIMEOUT;     //  *********     the code exits here  ****************
        }
      }
    }

thank you

1 REPLY 1

I haven't forgotten to answer to your original thread, I just don't know what to say. I don't have a 'L0 at hand, and I never encountered problems setting this particular bit on other STM32.

I would perhaps recommend to get rid of Cube/HAL and write a simple experimental code which does nothing just sets RCC_APB1ENR.PWRE and then tries to set PWR_CR.DBP.

Also, experiment with these things in debugger.

JW

PS.

LSE does not start before you enable it in RCC_CSR, and you cannot enable it before you set DBP.

Also, you cannot measure directly on the LSE pins/crystal, as it's a ultralow-power circuit and your oscilloscope probe is too much of a load so it simply "chokes" it. Unless you are specially equipped for this (using ultralow-impedance active proble) LSE is to be measured indirectly, by outputting it to some pin through the STM32 - but in the low-pin-count package this may be a challenge.

Also, try experimenting on a "known-good" board such as Nucleo or Disco.