QUADSPI_BK1_IO3 issue in STM32G474 and STM32H753

[junggun]

Hello.

I am testing QSPI indirect mode using STM32G474 and STM32H753.

However, I found a weird operation of QUADSPI_BK1_IO3 pin.

Other pins are OK, but QUADSPI_BK1_IO3 is high states as in the redboxes.

It should be low states (0).

I have tested in STM32G474 and STM32H753.

Both are the same.

Plz let me know how to solve this issue.

JG

while (1) {

  sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;

  sCommand.AddressMode = QSPI_ADDRESS_4_LINES;

  sCommand.AddressSize = QSPI_ADDRESS_24_BITS;

  sCommand.Address = 0x008000;

  sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;

  sCommand.DataMode = QSPI_DATA_4_LINES;

  sCommand.DummyCycles = 2;

  sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;

  sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;

  sCommand.NbData = 4;

  sCommand.NbData = 2;

  sCommand.Instruction = 0x81;  //AF

  sCommand.Address = 0x008000;

  if (HAL_QSPI_Command(&hqspi, &sCommand, 1000) != HAL_OK) {

    Error_Handler();

  }

  uint8_t test[2];

uint8_t test22];

test[0] = 0x12;

test[1] = 0x48;

if (HAL_QSPI_Transmit(&hqspi, &test, 1000) != HAL_OK) {

  Error_Handler();

}

if (HAL_QSPI_Command(&hqspi, &sCommand, 1000) != HAL_OK) {

  Error_Handler();

}

sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;

sCommand.AddressMode = QSPI_ADDRESS_4_LINES;

sCommand.AddressSize = QSPI_ADDRESS_24_BITS;

sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;

sCommand.DataMode = QSPI_DATA_4_LINES;

sCommand.DummyCycles = 2;

sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;

sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;

sCommand.NbData = 2;

sCommand.Instruction = 0xaa;

sCommand.Address = 0x008000;

if (HAL_QSPI_Command(&hqspi, &sCommand, 1000) != HAL_OK) {

  Error_Handler();

}

if (HAL_QSPI_Receive(&hqspi, &test2, 1000) != HAL_OK) {

  Error_Handler();

}

}

[KDJEM.1]

Hello @junggun  and welcome to the Community :),

Which pin are you using for the QUADSPI_BK1_IO3?

Which device is connected to the Quadspi interface?

Could you please check the QSPI Configuration may these examples can help you.

Thank you.

Kaouthar

[Adielfr]

Hey, we suffer from the same issue in our design. We are using pin PD13 as IO3 in QUADSPI interface and observing a high level state after the first transaction (while it should be low). The slave device is XA7A100T FPGA (no internal or external pull up). Can you please advice us what can we do to solve it?

Note that we use STM32H743VIH6 in the design

Thanks

[KDJEM.1]

Hello @Adielfr ,

Could you please check the GPIO configuration, for that I recommend you to take a look at AN4760 section GPIOs configuration.

Please refer "Recommended PCB routing guidelines for STM32H74xI/G and STM32H75xI/G devices" for QUADSPI Interface signal layout guidelines to check your PCB.

Thank you.

Kaouthar