PWM output synchronization problem
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‎2020-05-24 9:47 PM
Hi,Master:
​
​Platform: STM32F301K8U
CPU clock frequency:72M
​
As shown in the figure, the original analog video signal (PA7 pin) is compared with DAC1_CH1 through a comparator, and a pulse sequence with a slightly changed duty cycle and period is output. ).
my question:
How to control PA8 (or PA9 / PA10) to output a pulse sequence that is inverse to this pulse sequence, but the phase shift should not exceed 0.25us? I now capture the input of PA3 and control the PWM output of PA8 in its interrupt, resulting in the output waveform always being slower than PA2 (much greater than 0.25us).
Thank you very much.
​
Solved! Go to Solution.
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STM32F3 Series
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TIM
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‎2020-06-28 7:10 AM
Hi,​ berendi
Your idea helped me, I have solved this problem very well, thanks again for your help, best wishes to you.
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‎2020-06-28 7:11 AM
Ok thanks for sharing.
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‎2020-06-30 7:36 AM
ok,thanks again for your help.​

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