2014-04-29 02:44 AM
Hi All
The waveform.png file I have attached to show what i have to do. I have to generate similar kind of waveform with using one timer . The timer clock is 168 MHz...... One waveform will be 2 clock on and 4 clock off again 2 clock on , 4 clock off so on for 5 micro sec like wise the other one bur in the opposite way . there should be 1 clock cycles delay between waveform 1 falling edge and waveform 2 rising edge and vice versa. Is this possible to do .. if yes can any body guide me how to achieve this2014-04-29 02:59 AM
Sorry Please find the attachment to see the waveform. I have attached the waveform
________________ Attachments : waveform.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Hzst&d=%2Fa%2F0X0000000bR0%2F5Ji2bnTMJR_hX542tr0oGe8LOwfRYFp2H7TAEIrNLUI&asPdf=false2014-04-29 04:47 AM
Hi
''Is this possible to do .. if yes can any body guide me how to achieve this'' Yes. Since you want 2 different waveforms - you will need 2 timers. You can slave 1 timer to another, the slave will start synchronously with the first. The waveform you want is not square - so you cannot use simple timer (toggling IO will give a square wave). Instead, you will have to use PWM mode, this will involve a CCMRx register for each timer. The ARR reg controls the period of the PWM. The CCMR reg cotnrols the pulse width.2014-04-29 05:32 AM
Sorry it is not 2 clocks it is 280 clocks and 1 clocks is 140 clocks and 4 clocks is 420 ....Do you have any example for that
2014-04-29 05:34 AM
but I should use 2 different channels of 1 timer not 2 timer is that possible
2014-04-29 08:29 AM
''Do I have any examples''
No. Search the STM32 forum. Clive1 has provided PWM examples. I think it is a simple case of copying the same code for 2nd timer and then slaving it to the first (I have not done it myself). ''should use 2 different channels of 1 timer not 2 timer is that possible'' No. 2 Timers and 2 channels. The timers provide the count. The channels provide the capture/compare register (CCMRx).2014-04-29 10:28 PM
but how it is possible to get a delay of 140 clocks between those waves , when will start synchronously
2014-04-30 02:27 AM
Hi
Basic Timer operation. Timer is just a counter. Timer has various clocking schemes - clocking mean incrementing/decrementing count CNT - counting frequency. Timer has register to count up to, then will reset (back to 0) - ARR -known as period. Timer can be connected to IO pin (do not have to use ISR to toggle IO pin - done automatically) This is basic mode. Timer has more advanced modes - 1 of them is PWM output. PWM uses 'channel' - uses the CCMRx register The CCMRx register controls Duty Cycle - ratio of on/off eg ARR = 100 CCMR = 50 50 % Duty cycle ARR = 100 CCMR = 25 25 % on, 75% off Timer Advanced mode - can link (slave) one timer to another. All slave timers will be reset (CNT = 0) by master timer