Overcoming SPI speed limitation on H743- inspiration needed

[PMath.4]

I'm setting the SPI input clock for the port I'm using at 50MHz to allow SPI speeds up to 25MHz for use with an SD card under SPI. However, this gives a minimum speed of 50MHz/256 = 195KHz and this is too fast for initialising some SD cards. I need to find a way to get a lower speed (<100KHz) whilst maintaining the 25MHz maximum. The SPI incoming clock is derived from PLL2Q.

Changing the PLL settings can only be done with PLL disabled and that isn't possible as PLL2 is also used for FMC

Inspiration needed

[waclawek.jan]

At a cost of one pin and one timer, you could run SPI as slave and generate timing by the (much more flexible) timer.

Master-only SPI can be pulled off with USART in synchronous mode - with the limitation of being LSB only, 8-bit only, non-continguous clock (don't know if these limitations still hold for 'H7, I don't H7).

Ultimately, you can always bit-bang an SPI master.

JW

[TDK · Accepted solution]

The SPI peripherals have 5-6 different clock sources. Switch to a different one when you want 100 kHz mode and switch back when you want 25 MHz.

[berendi]

The H743 has two dedicated SD/MMC ports, is it not possible to use one of them?

[PMath.4]

Thanks all for the input and ideas.

"The SPI peripherals have 5-6 different clock sources. Switch to a different one when you want 100 kHz mode and switch back when you want 25 MHz."

I'd assumed this also needed PLL stopping but I've now seen it doesn't - thanks

"The H743 has two dedicated SD/MMC ports, is it not possible to use one of them?"

Too late for the H/W design. Getting SD/MMC to work always seems like a nightmare and seems very susceptible to PCB layout. In addition the ST FatFS/SDMMC supplied code is catastrophically inefficient with far too many layers and uses an out-of-date version of FatFS. My SPI code outperforms ST's SDMMC by a significant margin and I don't have the time or inclination to code SD/MMC at the register level which I what I do for SPI