One bit shift in SPI communication on STM32H7

[Gpeti]

I'm working on SPI communication between two Nucleo-H743ZI boards. I'm using ST's HAL, and the SPI polling API HAL_SPI_TransmitReceive.

It's working fine until a bandwith of 12Mbits/s (SPI kernel clock at 200Mhz and prescaler 16, the CPU is always at 400Mhz) but fails above (smaller prescaler).

I want to understand since 24 or 48 Mbits/s doesn't seem much even in polling with a poor quality software.

With prescaler set to 8, I don't have SPI error like overrun or other (I checked directly in registers), however the data are not correct. looking closer to the data, I've noticed that there is only a shift of one bit.

More precisely I should receive (in hexa :( 0x30 0x31 0x32 ... And I receive 0x18 0x18 0x99...

In binary:

• expected 0011 0000 0011 0001 0011 0010...
• received 0001 1000 0001 1000 1001 1001...

If I shift the received bitstream to the left I get exactly the right result.

Does it ring something to you ? Could it be due to a bad configuration ?

Obviously master and slave have the same configuration regarding phase and polarity (and everything else since the source code is mostly identical).

[Tesla DeLorean]

Clock polarity/phase configuration

[Gpeti]

This is the first thing I've checked but, as I've written, phase and polarity are the same for both slave and master (CPOL=0, CPHA=0). Checked directly in registers.

[Andreas Bolsch · Accepted solution]

Do you receive the correct number of frames? No leftover or missing bit at the very end?

According to the datasheet SPI max clock is well above 24 MHz in your setting. Hence, as simply switching the prescaler causes the problem to appear, it might be a hardware issue. Did you set OSPEEDR for all pins involved to 11? Long wires? (Almost) broken jumper wires, bad contact?

[S.Ma]

Well, you have flying cables between nucleo and trying to send 24MHz signals.

Use a scope and look at the signals, their ringing, they skew time.

SWD is the worst case, there is a delay for outputing data back to master which limits the max speed, and you have to reduce speed in read mode.

Probe with a scope to get clues.

[thomfischer]

Hi,

check

hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;

if this is set to SPI_MASTER_KEEP_IO_STATE_DISABLE it releases the SPI pins if SPI is disabled,

the result can be that spi clock changes at end of spi transfer and Slave Select is still activ (one additinal clock cycle)

Bit 31 AFCNTR: alternate function GPIOs control

This bit is taken into account when SPE=0 only

0: the peripheral takes no control of GPIOs while it is disabled

1: the peripheral keeps always control of all associated GPIOs

When SPI master has to be disabled temporary for a specific configuration reason (e.g. CRC

reset, CPHA or HDDIR change) setting this bit prevents any glitches on the associated

outputs configured at alternate function mode by keeping them forced at state corresponding

the current SPI configuration. This bit must be never used at slave mode as any slave

transmitter must not force its MISO output once the SPI is disabled.

[Gpeti]

That was indeed due to OSPEEDR set to "low speed" in STMicro example. It's working if I increase the speed.

[GS1]

Thank you very much for this tip!!! Saved me a lot of time for searching for the reason of radomly shifted data by 1Bit.

Setting this to SPI_MASTER_KEEP_IO_STATE_ENABLE; now my SPI conversation does no longer shift the data by 1 Bit in DMA mode, which it actually did sometimes. Most transfers were ok, but some were shifted randomly.

BR GS

[sireevenkat1]

Hi @GS1 @thomfischer 
I'm also working on SPI communication between STM32G4 and ATM90E26. I'm using ST's HAL, and the SPI polling API with HAL_SPI_Transmit and HAL_SPI_Receive.
For me also One bit shift  is happening in SPI communication.
But I tried to do hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; in my code but For STM32G4 there is no MasterKeepIOState parameter  available. Its giving me the error. 
Can you guys please suggest me what to do with this issue. 
Thanks

[waclawek.jan]

Set the SCK pin's OSPEEDR setting to higher than lowest.

If this won't help, start a new thread, describing exactly symptoms of your problem, the hardware you are using (including a photo), software setup, and perhaps linking to this thread.

JW